User's Manual

2-43 Event-Trigger SOCB Pulse Generator .................................................................................. 67
3-1 Simplified ePWM Module.................................................................................................. 70
3-2 EPWM1 Configured as a Typical Master, EPWM2 Configured as a Slave ........................................ 71
3-3 Control of Four Buck Stages. Here F
PWM1
F
PWM2
F
PWM3
F
PWM4
.................................................. 72
3-4 Buck Waveforms for Figure 3-3 (Note: Only three bucks shown here) ............................................. 73
3-5 Control of Four Buck Stages. (Note: F
PWM2
= N x F
PWM1
) ............................................................. 75
3-6 Buck Waveforms for Figure 3-5 (Note: F
PWM2
= F
PWM1)
) .............................................................. 76
3-7 Control of Two Half-H Bridge Stages (F
PWM2
= N x F
PWM1
) ........................................................... 78
3-8 Half-H Bridge Waveforms for Figure 3-7 (Note: Here F
PWM2
= F
PWM1
) .............................................. 79
3-9 Control of Dual 3-Phase Inverter Stages as Is Commonly Used in Motor Control ................................ 81
3-10 3-Phase Inverter Waveforms for Figure 3-9 (Only One Inverter Shown) ........................................... 82
3-11 Configuring Two PWM Modules for Phase Control .................................................................... 84
3-12 Timing Waveforms Associated With Phase Control Between 2 Modules .......................................... 85
3-13 Control of a 3-Phase Interleaved DC/DC Converter ................................................................... 86
3-14 3-Phase Interleaved DC/DC Converter Waveforms for Figure 3-13 ................................................ 87
3-15 Controlling a Full-H Bridge Stage (F
PWM2
= F
PWM1)
..................................................................... 89
3-16 ZVS Full-H Bridge Waveforms ........................................................................................... 90
4-1 Time-Base Period Register (TBPRD).................................................................................... 94
4-2 Time-Base Phase Register (TBPHS) .................................................................................... 94
4-3 Time-Base Counter Register (TBCTR) .................................................................................. 94
4-4 Time-Base Control Register (TBCTL) ................................................................................... 95
4-5 Time-Base Status Register (TBSTS) .................................................................................... 97
4-6 Counter-Compare A Register (CMPA) .................................................................................. 97
4-7 Counter-Compare B Register (CMPB) .................................................................................. 98
4-8 Counter-Compare Control Register (CMPCTL) ........................................................................ 99
4-9 Action-Qualifier Output A Control Register (AQCTLA) ............................................................... 100
4-10 Action-Qualifier Output B Control Register (AQCTLB) ............................................................... 101
4-11 Action-Qualifier Software Force Register (AQSFRC) ................................................................ 102
4-12 Action-Qualifier Continuous Software Force Register (AQCSFRC) ................................................ 102
4-13 Dead-Band Generator Control Register (DBCTL) .................................................................... 103
4-14 Dead-Band Generator Rising Edge Delay Register (DBRED) ...................................................... 105
4-15 Dead-Band Generator Falling Edge Delay Register (DBFED) ..................................................... 105
4-16 PWM-Chopper Control Register (PCCTL) ............................................................................. 105
4-17 Trip-Zone Select Register (TZSEL) .................................................................................... 107
4-18 Trip-Zone Control Register (TZCTL) ................................................................................... 108
4-19 Trip-Zone Enable Interrupt Register (TZEINT) ........................................................................ 108
4-20 Trip-Zone Flag Register (TZFLG)....................................................................................... 109
4-21 Trip-Zone Clear Register (TZCLR) ..................................................................................... 110
4-22 Trip-Zone Force Register (TZFRC) ..................................................................................... 110
4-23 Event-Trigger Selection Register (ETSEL) ............................................................................ 111
4-24 Event-Trigger Prescale Register (ETPS) .............................................................................. 112
4-25 Event-Trigger Flag Register (ETFLG) .................................................................................. 113
4-26 Event-Trigger Clear Register (ETCLR) ................................................................................ 114
4-27 Event-Trigger Force Register (ETFRC) ................................................................................ 115
6 List of Figures SPRU791D November 2004 Revised October 2007
Submit Documentation Feedback