Data Sheet

ManualsBrandsUnbranded ManualsActive ComponentsLP3964EMP-ADJ/NOPB PMIC - LDO voltage regulator Positive, adjustable SOT 223 5

LP3961, LP3964

www.ti.com

SNVS056H –MAY 2000–REVISED APRIL 2013

LP3961/LP3964 800mA Fast Ultra Low Dropout Linear Regulators

Check for Samples: LP3961, LP3964

FEATURES

DESCRIPTION

The LP3961/LP3964 series of fast ultra low-dropout

• Ultra Low Dropout Voltage

linear regulators operate from a +2.5V to +7.0V input

• Low Ground Pin Current

supply. Wide range of preset output voltage options

• Load Regulation of 0.02%

are available. These ultra low dropout linear

regulators respond very fast to step changes in load

• 15µA Quiescent Current in Shutdown Mode

which makes them suitable for low voltage

• Specified Output Current of 0.8A DC

microprocessor applications. The LP3961/LP3964 are

• Available in SOT-223, SFM/TO-263 and TO-220

developed on a CMOS process which allows low

Packages

quiescent current operation independent of output

load current. This CMOS process also allows the

• Output Voltage Accuracy ± 1.5%

LP3961/LP3964 to operate under extremely low

• Error Flag Indicates Output Status (LP3961)

dropout conditions.

• Sense Option Improves Better Load

Dropout Voltage: Ultra low dropout voltage; typically

Regulation (LP3964)

24mV at 80mA load current and 240mV at 800mA

• Extremely Low Output Capacitor

load current.

Requirements

Ground Pin Current: Typically 4mA at 800mA load

• Overtemperature/Overcurrent Protection

current.

• −40°C to +125°C Junction Temperature Range

Shutdown Mode: Typically 15µA quiescent current

when the shutdown pin is pulled low.

APPLICATIONS

Error Flag:Error flag goes low when the output

• Microprocessor Power Supplies

voltage drops 10% below nominal value (for LP3961).

• GTL, GTL+, BTL, and SSTL Bus Terminators

SENSE: Sense pin improves regulation at remote

• Power Supplies for DSPs

loads. (For LP3964)

• SCSI Terminator

Precision Output Voltage: Multiple output voltage

• Post Regulators

options are available ranging from 1.2V to 5.0V and

• High Efficiency Linear Regulators

adjustable (LP3964), with a specified accuracy of

±1.5% at room temperature, and ±3.0% over all

• Battery Chargers

conditions (varying line, load, and temperature).

• Other Battery Powered Applications

Typical Application Circuits

A. SD and ERROR pins must be pulled high through a 10kΩ pull-up resistor. Connect the ERROR pin to ground if this

function is not used. See Application Hints for more information.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (32 pages)

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LP3961, LP3964 www.ti.com SNVS056H – MAY 2000 – REVISED APRIL 2013 LP3961/LP3964 800mA Fast Ultra Low Dropout Linear Regulators Check for Samples: LP3961, LP3964 FEATURES DESCRIPTION • • • • • • The LP3961/LP3964 series of fast ultra low-dropout linear regulators operate from a +2.5V to +7.0V input supply. Wide range of preset output voltage options are available.
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LP3961, LP3964 SNVS056H – MAY 2000 – REVISED APRIL 2013 www.ti.com *SD and ERROR pins must be pulled high through a 10kΩ pull-up resistor. Connect the ERROR pin to ground if this function is not used. See Application Hints for more information.
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LP3961, LP3964 www.ti.com SNVS056H – MAY 2000 – REVISED APRIL 2013 Block Diagram LP3964 Block Diagram LP3964-ADJ Connection Diagram Figure 1. Top View SOT-223-5 Package Figure 2. Top View TO-220-5 Package Bent, Staggered Leads Figure 3.
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LP3961, LP3964 SNVS056H – MAY 2000 – REVISED APRIL 2013 www.ti.
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LP3961, LP3964 www.ti.com SNVS056H – MAY 2000 – REVISED APRIL 2013 Operating Ratings (1) 2.5V to 7.0V Shutdown Input Voltage (Operating) −0.3V to VIN+0.3V Input Supply Voltage (Operating), Maximum Operating Current (DC) 0.8A Operating Junction Temp. Range −40°C to +125°C (1) The minimum operating value for VIN is equal to either [VOUT(NOM) + VDROPOUT] or 2.5V, whichever is greater.
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LP3961, LP3964 SNVS056H – MAY 2000 – REVISED APRIL 2013 www.ti.com Electrical Characteristics LP3961/LP3964 (continued) Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 10 mA, COUT = 33µF, VSD = VIN-0.3V.
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LP3961, LP3964 www.ti.com SNVS056H – MAY 2000 – REVISED APRIL 2013 Typical Performance Characteristics Unless otherwise specified, VIN =VO(NOM) + 1V, VOUT= 2.5V, COUT = 33µF, IOUT = 10mA, CIN = 68µF, VSD = VIN, and TA = 25°C. Drop-Out Voltage Vs Temperature for Different Load Currents Drop-Out Voltage Vs Temperature for Different Output Voltages (IOUT = 800mA) Figure 4. Figure 5. Ground Pin Current Vs Input Voltage (VSD=VIN) Ground Pin Current Vs Input Voltage (VSD=100mV) Figure 6. Figure 7.
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LP3961, LP3964 SNVS056H – MAY 2000 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, VIN =VO(NOM) + 1V, VOUT= 2.5V, COUT = 33µF, IOUT = 10mA, CIN = 68µF, VSD = VIN, and TA = 25°C. 8 Ground Pin Current Vs Shutdown Pin Voltage Input Voltage Vs Output Voltage Figure 10. Figure 11. Output Noise Density, VOUT= 2.5V Output Noise Density, VOUT= 5V Figure 12. Figure 13. Load Transient Response Ripple Rejection vs Frequency Figure 14.
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LP3961, LP3964 www.ti.com SNVS056H – MAY 2000 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Unless otherwise specified, VIN =VO(NOM) + 1V, VOUT= 2.5V, COUT = 33µF, IOUT = 10mA, CIN = 68µF, VSD = VIN, and TA = 25°C. δVOUT vs Temperature Noise Density VIN = 3.5V, VOUT = 2.5V, IL = 10 mA Figure 16. Figure 17. Line Transient Response Line Transient Response Figure 18. Figure 19. Line Transient Response (IOUT = 800mA) Line Transient Response (IOUT = 800mA) Figure 20.
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LP3961, LP3964 SNVS056H – MAY 2000 – REVISED APRIL 2013 www.ti.com APPLICATION HINTS EXTERNAL CAPACITORS Like any low-dropout regulator, external capacitors are required to assure stability. these capacitors must be correctly selected for proper performance. INPUT CAPACITOR: The LP3961/4 requires a low source impedance to maintain regulator stability because the internal bias circuitry is connected directly to VIN.
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LP3961, LP3964 www.ti.com SNVS056H – MAY 2000 – REVISED APRIL 2013 CAPACITOR CHARACTERISTICS CERAMIC: For values of capacitance in the 10 to 100 µF range, ceramics are usually larger and more costly than tantalums but give superior AC performance for bypassing high frequency noise because of very low ESR (typically less than 10 mΩ). However, some dielectric types do not have good capacitance characteristics as a function of voltage and temperature.
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LP3961, LP3964 SNVS056H – MAY 2000 – REVISED APRIL 2013 www.ti.com RFI/EMI SUSCEPTIBILITY RFI (radio frequency interference) and EMI (electromagnetic interference) can degrade any integrated circuit's performance because of the small dimensions of the geometries inside the device. In applications where circuit sources are present which generate signals with significant high frequency energy content (> 1 MHz), care must be taken to ensure that this does not affect the IC regulator.
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LP3961, LP3964 www.ti.com SNVS056H – MAY 2000 – REVISED APRIL 2013 The primary source of noise in low-dropout regulators is the internal reference. In CMOS regulators, noise has a low frequency component and a high frequency component, which depend strongly on the silicon area and quiescent current. Noise can be reduced in two ways: by increasing the transistor area or by increasing the current drawn by the internal reference.
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LP3961, LP3964 SNVS056H – MAY 2000 – REVISED APRIL 2013 www.ti.com SENSE PIN In applications where the regulator output is not very close to the load, LP3964 can provide better remote load regulation using the SENSE pin. Figure 23 depicts the advantage of the SENSE option. LP3961 regulates the voltage at the output pin. Hence, the voltage at the remote load will be the regulator output voltage minus the drop across the trace resistance. For example, in the case of a 3.
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LP3961, LP3964 www.ti.com SNVS056H – MAY 2000 – REVISED APRIL 2013 where IGND is the operating ground current of the device (specified under Electrical Characteristics).
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LP3961, LP3964 SNVS056H – MAY 2000 – REVISED APRIL 2013 www.ti.com Figure 25. Maximum power dissipation vs ambient temperature for SFM/TO-263 package Figure 26 shows a curve for the θJA of SOT-223 package for different copper area sizes, using a typical PCB with 1 ounce copper and no solder mask over the copper area for heat sinking. Figure 26. θJA vs Copper(1 Ounce) Area for SOT-223 package The following figures show different layout scenarios for SOT-223 package. Figure 27.
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LP3961, LP3964 www.ti.com SNVS056H – MAY 2000 – REVISED APRIL 2013 Figure 29. SCENARIO C, θJA = 92°C/W Figure 30.
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LP3961, LP3964 SNVS056H – MAY 2000 – REVISED APRIL 2013 www.ti.com Figure 31. SCENARIO E, θJA = 77°C/W Figure 32.
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LP3961, LP3964 www.ti.com SNVS056H – MAY 2000 – REVISED APRIL 2013 Figure 33. SCENARIO G, θJA = 113°C/W Figure 34.
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LP3961, LP3964 SNVS056H – MAY 2000 – REVISED APRIL 2013 www.ti.com Figure 35. SCENARIO I, θJA = 78.
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LP3961, LP3964 www.ti.com SNVS056H – MAY 2000 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision G (April 2013) to Revision H • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 PACKAGING INFORMATION Orderable Device Status (1) LP3961EMP-1.8/NOPB Package Type Package Pins Package Drawing Qty ACTIVE SOT-223 NDC 5 1000 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LBAB (4/5) LP3961EMP-2.5 NRND SOT-223 NDC 5 1000 TBD Call TI Call TI -40 to 125 LBBB LP3961EMP-2.
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PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 1-Nov-2013 Status (1) LP3961ESX-3.3/NOPB Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LP3961ES -3.3 (4/5) ACTIVE DDPAK/ TO-263 KTT 5 500 LP3964EMP-1.8 NRND SOT-223 NDC 5 1000 TBD Call TI Call TI -40 to 125 LBFB LP3964EMP-1.
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PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 1-Nov-2013 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LP3964ESX-2.5/NOPB ACTIVE DDPAK/ TO-263 KTT 5 500 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LP3964ES -2.5 LP3964ESX-3.3 NRND DDPAK/ TO-263 KTT 5 500 TBD Call TI Call TI -40 to 125 LP3964ES -3.3 LP3964ESX-3.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) LP3961EMP-1.8/NOPB SOT-223 NDC 5 1000 330.0 16.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 7.0 7.5 2.2 12.0 16.0 Q3 LP3961EMP-2.5 SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3961EMP-2.5/NOPB SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LP3964EMP-2.5/NOPB SOT-223 NDC 5 1000 330.0 16.4 LP3964EMP-3.3 SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 7.0 7.5 2.2 12.0 16.0 Q3 LP3964EMP-3.3/NOPB SOT-223 NDC 5 1000 330.0 LP3964EMP-ADJ SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 16.4 7.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP3961EMP-2.5/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3961EMP-3.3 SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3961EMP-3.3/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3961EMP-5.0 SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3961EMP-5.0/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3961EMPX-1.8/NOPB SOT-223 NDC 5 2000 367.0 367.0 35.
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MECHANICAL DATA NDH0005D www.ti.
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MECHANICAL DATA NDC0005A www.ti.
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MECHANICAL DATA KTT0005B TS5B (Rev D) BOTTOM SIDE OF PACKAGE www.ti.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.