Datasheet

X9C102/103/104/503
1
©Xicor, Inc. 1994, 1995 Patents Pending Characteristics subject to change without notice
3863-2.4 9/18/96 T2/C0/D0 SH
DESCRIPTION
The Xicor X9C102/103/104/503 is a solid state nonvola-
tile potentiometer and is ideal for digitally controlled
resistance trimming.
The X9C102/103/104/503 is a resistor array composed of
99 resistive elements. Between each element and at
either end are tap points accessible to the wiper element.
The position of the wiper element is controlled by the CS,
U/D, and INC inputs. The position of the wiper can be
stored in nonvolatile memory and then be recalled upon a
subsequent power-up operation.
The resolution of the X9C102/103/104/503 is equal to
the maximum resistance value divided by 99. As an
example, for the X9C503 (50K) each tap point repre-
sents 505.
All Xicor nonvolatile memories are designed and tested
for applications requiring extended endurance and data
retention.
FEATURES
Compatible with X9102/103/104/503
Low Power CMOS
—V
CC
= 5V
—Active Current, 3mA Max
—Standby Current, 500µA Max
99 Resistive Elements
—Temperature Compensated
± 20% End to End Resistance Range
100 Wiper Tap Points
—Wiper Positioned via Three-Wire Interface
—Similar to TTL Up/Down Counter
—Wiper Position Stored in Nonvolatile
Memory and Recalled on Power-Up
100 Year Wiper Position Data Retention
X9C102 = 1K
X9C103 = 10K
X9C503 = 50K
X9C104 = 100K
E
2
POT
Nonvolatile Digital Potentiometer
X9C102/103/104/503
E
2
POT
is a trademark of Xicor, Inc.
3863 FHD F01
FUNCTIONAL DIAGRAM
7-BIT
UP/DOWN
COUNTER
7-BIT
NONVOLATILE
MEMORY
STORE AND
RECALL
CONTROL
CIRCUITRY
ONE
OF
ONE-
HUNDRED
DECODER
RESISTOR
ARRAY
99
98
97
96
2
1
0
V
L
V
W
V
H
U/D
INC
CS
V
CC
GND
TRANSFER
GATES
Terminal Voltage ±5V, 100 Taps
APPLICATION NOTES
AVAILABLE
AN42 • AN44–48 • AN50 • AN52 • AN53 • AN71 • AN73

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