XAPP794 (v1.3) December 20, 2013 www.xilinx.com 1
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Summary The Xilinx Zynq®-7000 All Programmable (AP) SoC Video and Imaging Kit (ZVIK) builds on the
Zynq-7000 AP SoC ZC702 evaluation kit (ZC702) [Ref 43] by including additional hardware,
software, and IP components for the development of custom video applications. The included
video reference designs, WUXGA color image sensor, and video I/O FPGA mezzanine card
(FMC) with HDMI™ input and output allow for immediate development of video system
software, firmware, and hardware designs.
This application note describes how to set up and run the 1080p60 camera image processing
reference design (camera design) using the ZVIK. Instructions are also included on how to
build the hardware and software components as well as how to create the SD card boot image.
The intended audience for this document includes video applications embedded system
developers, hardware developers, and system architects. To learn more about the Zynq-7000
AP SoC, the ZVIK, or for further development using the embedded design kit, consult the
References section. The Appendix provides a list of acronyms used in this application note.
Introduction This application note describes the 1080p60 camera image processing reference design that
showcases various features of the ZVIK, provides a working camera image processing
example design, and introduces several Xilinx video IP cores.
Video input is generated by the VITA-2000 image sensor from ON Semiconductor, which is
configured for 1080p60 resolution. The raw Bayer sub-sampled image is converted to an RGB
image by an image processing pipeline implemented using LogiCORE™ IP video cores that
remove defective pixels, de-mosaic, and color-correct the image. A video frame buffer is
implemented in the processing system (PS) DDR3 memory, making images accessible to the
ARM® processor cores via the AXI Video Direct Memory Access (VDMA). The video frame
buffer is not required for the operation of the image processing pipeline, but is included in the
design to enable the capture of input video images for analysis. Figure 1 shows a block diagram
of the design.
Application Note: Zynq-7000 All Programmable SoC Video and Imaging Kit
XAPP794 (v1.3) December 20, 2013
1080p60 Camera Image Processing
Reference Design
Authors: Mario Bergeron (Avnet, Inc.), Steve Elzinga, Gabor Szedo, Greg Jewett,
and Tom Hill (Xilinx, Inc.)

Summary of content (58 pages)