User manual

Introduction
XAPP794 (v1.3) December 20, 2013 www.xilinx.com 2
A web-based graphical user interface (GUI) allows configuring each of the Xilinx video IP cores
in the image processing pipeline, displaying information about the incoming image such as
histograms of the data, and enables processor-based operations on the data such as automatic
white balance and automatic exposure.
The hardware evaluation cores contained in the design time out after approximately four hours,
resulting in a blank screen. At this point, the board must be power-cycled to reload the design.
X-Ref Target - Figure 1
Figure 1: 1080p60 Camera Design Block Diagram
Firmware
on SD Card
DDR Memory Controller
DDR3
S_AXI4_HPx
M_AXI4_GP
AXI4 Stream
APU
Dual Core
Cortex-A9 + OCM
Camera
Input
AXI
VDMA
HDMI
Output
Image
Processing
Pipeline
Hardened
Peripherals
(USB, GigE,
CAN, SPI,
UART, 12C
GPIO)
Processing
System
Programmable Logic
PC running
Web-based GUI
VITA-2000
Camera
HDMI Monitor
AMBA
®
Switches
AMBA Switches
X794_01_102512