Data Sheet
© 2009 Microchip Technology Inc. DS22088C-page 23
MCP3422/3/4
FIGURE 5-4: Timing Diagram For Reading From The MCP3422/3/4 With 18-Bit Mode.
9
1
9
1
9
1
9
1
9
1
9
1
110 1A2
A1
A0
D
RDY
O/C
ACK by
R/W
Start Bit by
Master
Repeat of D17 (MSB)
2nd Byte
Upper Data Byte
(Data on Clocks 1-6th
can be ignored)
ACK by
Master
ACK by
Master
ACK by
Master
To continue: ACK by Master
17
D
16
D
15
D
14
D
13
D
12
D
11
D
10
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
C
1
C
0
S
1
S
0
G
1
G
0
1st Byte
Address Byte
3rd Byte
Middle Data Byte
4th Byte
Lower Data Byte
5th Byte
Configuration Byte
(Optional)
C
1
C
0
S
1
S
0
G
1
G
0
NAK by
Master
Stop Bit by
Master
(Optional)
Nth Repeated Byte:
Configuration Byte
Note: – MCP3422/3/4 device code is 1101.
– See Figure 5-1 for details in Address Byte.
– Stop bit or NAK bit can be issued any time during reading.
– Data bits on clocks 1 - 6th in 2nd byte are repeated MSB and can be ignored.
– Configuration byte repeats as long as clock is provided after the 5th byte.
SCL
SDA
RDY
O/C
To end: NAK by Master
MCP3422/3/4
MCP3422/3/4