User's Manual

Table Of Contents
USER MANUAL
12-4
21464-5
NORMARC 7050
MARKER BEACON
Detailed Description ©1999 Navia Aviation AS
inputs to the FPGA are the strapped signals used to select outer, middle, inner or FAN marker
frequency, as well as status signals regarding oscillator, RF- and LF-level output. Communi-
cation with the FPGA is done by the IOD[7:0], ~TXRD and ~TXWR signals. Multiplying DAC’s
are used to adjust RF level and modulation depth. The keyed LF signal and the RF level is
applied to the Modulation Control Circuits. The modulation voltages to the PA is generated by
the use of these signals as well as the ON/OFF signal from the AGC and the detected signal
from the PA.
MAINTENANCE / MONITOR CIRCUITRY
The purpose of the onboard monitor circuitry is to give the Monitor card MO 1374 information
about the status of the transmitter. The AMUX_ADR[3:0] from the MO 1374 is applied to the
analogue multiplexer. These four lines select one of sixteen possible signals to be measured.
The signals measured are:
PA 20 VDC supply voltage
PA current drain @ 20 VDC
Detected RF level from demodulator
Keying envelope from demodulator
Positive/negative modulation peaks
LF AGC voltage
Driver AGC voltage
RF level DC voltage from LF generator
Supply voltage status
The signal information is sent to the MO 1374 monitor unit as a differential analogue test sig-
nal from the MUX.
12.1.2 MO1374 Monitor
12.1.2.1 General description
The MO1374 monitor is a microprocessor based module. It contains the MB software and
forms the basis of the monitor, transmitter control, system maintenance handling and RMS
user interface.
The MO1374 consists of two submodules:
The CPU section includes; CPU, memory, communication ports and an AD converter system.
The RF frontend receives a recombined 75MHz AM monitor signal with modulation frequency
of 400, 1300 or 3000 Hz, from one or two antennas. This signal is conditioned, mixed and
demodulated to produce the output parameters; RF level, modulation level and keying enve-
lope. These parameters are monitored by the CPU section.