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Quick Start

AX_SPU

Dokumenten_ID: SYS_Quick Start_AX_SPU_1.0

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Rubriken/Sublines

Summary of content (7 pages)

PAGE 1
Rubriken/Sublines Quick Start AX_SPU Dokumenten_ID: SYS_Quick Start_AX_SPU_1.0 Vertraulich. Die Weitergabe, sowie Vervielfältigung dieser Unterlage, Verwertung und Mitteilung ihres Inhalts ist nicht gestattet, soweit nicht ausdrücklich zugestanden. Zuwiderhandlungen verpflichten zu Schadenersatz. Alle Rechte vorbehalten, insbesondere für den Fall der Patenterteilung oder GM-Eintragung. Confidential.
PAGE 2
Quick Start SYS_Quick Start_AX_SPU_1.0 Bearbeitungsstatus Fachl. Status Version Name Bearbeiter Art der Bearbeitung Datum 1.0 Germersdorf Ersterstellung 02/02/15 Aab Mögliche Status = iA (in Arbeit) Aab (Arbeit abgeschlossen) Freigabestatus Fachl. Status Version Freigegeben von (Name) Mögliche Status = AX_SPU_QuickStart_1.0.
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Quick Start SYS_Quick Start_AX_SPU_1.0 Contents 1 Overview and board components 4 1.1 Board overview 4 1.2 Processing unit 5 1.3 IOs 5 1.4 Further components 5 1.5 Supply voltage and operating conditions 5 2 Getting started 6 2.1 Start Design 6 2.2 Required 6 2.3 Steps to follow 6 3 References 7 AX_SPU_QuickStart_1.0.
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Quick Start SYS_Quick Start_AX_SPU_1.0 1 Overview and board components 1.1 Board overview Figure 1: Board overview top Figure 2: Board overview bottom AX_SPU_QuickStart_1.0.
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Quick Start SYS_Quick Start_AX_SPU_1.0 1.2 Processing unit • Altera Cyclone V FPGA 5CEBA2U15 with 25 MHz clock • Flash memory N25Q032A13ESC as FPGA configuration flash in active serial single device configuration AS x 4 1.
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Quick Start SYS_Quick Start_AX_SPU_1.0 2 Getting started 2.1 Start Design A small test project (/documentation/quickstart/AXSPU_test_fpga) is available for getting started. You can use this project as a basis to develop your own application. In the test design all available board pins are used and the LEDs are toggled. The pinfile is located at AXSPU_test_top.qsf. 2.2 Required – 3.
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Quick Start SYS_Quick Start_AX_SPU_1.0 3 References CV-52005: Altera, I/O Features in Cyclone V Devices, 2013.06.21 AX_SPU_BO: abaxor engineering, AX_SPU_BO Quickstart, 2015.02.02 USB-DWLD_1: Altera, Altera USB Blaster Download Cable, www.altera.com/products/devkits/kit-cables.html USB-DWLD_2: Terasic, USB Blaster Download Cable Terasic Inc P0302, www.terasic.com.tw/cgi-bin/page/archive.pl?No=46 QII5V1: Altera, Quartus II Handbook Volume 1: Design and Synthesis, 2014.12.