User`s manual

Hardware Setup 2-13
2.5.8. System Management Bus Header
This header is reserved for system management bus (SM bus). The SM bus is a
specific implementation of an I
2
C bus. I
2
C is a multi-master bus, which means that
multiple chips can be connected to the same bus and each one can act as a master by
initiating a data transfer. If more than one master simultaneously tries to control the
bus, an arbitration procedure decides which master gets priority.
User’s Manual