Product Info

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5
Pin44
D-
USB D-
USB
Pin45 D+ USB D+ USB
Pin46
VDDH
High voltage power supply
Pin47
NC
NC
Pin48 P0.11 Digital I/O
Pin49 P1.08 Digital I/O
Pin50 P0.07 Digital I/O
Pin51 P0.27 Digital I/O
Pin52 P0.05/AIN3 Digital I/O/Analog input 3
Pin53 P0.30/AIN6 Digital I/O/Analog input 6 Standard drive, low frequency I/O
Pin54
P0.28/AIN4
Digital I/O/Analog input 4
Standard drive, low frequency I/O
Pin55
NC
NC
Pin56
P0.23
Digital I/O
Standard drive, low frequency I/O
*Low f
requency I/O is signals with a frequency up to 10 kHz
Note: An internal 4.7μF bulk capacitor has been included on the module. For those application that
with heavy GPIO usage and/or current draw, it is good design practice to add additional bulk
capacitance as required for your application.
General Purpose I/O:
Each GPIO can be accessed individually with the following user configurable features:
 Input/output direction
 Output drive strength
 Internal pull-up and pull-down resistors
 Wake-up from high or low level triggers on all pins
 Trigger interrupt on all pins
 All pins can be used by the PPI task/event system; the maximum number of pins that can be
interfaced through the PPI at the same time is limited by the number of GPIOTE channels
 All pins can be individually configured to carry serial interface or quadrature demodulator
signals
Hardware RESET:
There is on-chip power-on reset circuitry, But can still be used in external reset mode, in this case,
GPIO pin P0.18 as an external hardware reset pin. In order to utilize P0.18 as a hardware reset, the
UICR registers PSELRESET[0] and PSELRESET[1] must be set alike, to the value of 0x7FFFFF12.
When P0.18 is programmed as RESET, the internal pull-up is automatically enabled.
HW debug and flash programming of Module :
The Module support the two pin Serial Wire Debug (SWD) interface and offers flexible and powerful
mechanism for non-intrusive debugging of program code. Breakpoints, single stepping, and
instruction trace capture of code execution flow are part of this support.