User guide

150 RealCT Direct API Developer Guide
Chapter 5: MVIP-90
Configuring the MVIP-90 Clock
Understanding Clocking Signals
Boards connected in an MVIP-90 bus use an 8-kHz clock signal
to synchronize frames.
The MVIP-90 bus uses the following clocks:
/F0 is the primary 8-kHz framing signal
/C4 is the bus 4.096 MHz clock
/C2 is the bus 2.048 MHz clock
SEC8K is a secondary 8-kHz signal
An RTNI board in the system drives the /F0 clock, which other
boards use as a reference. You can also specify that boards use
SEC8K as a backup signal. SEC8K acts as a fallback in case the
/F0 signal fails. You do not configure either the /C4 or /C2 clocks.
Setting the Clock for T1
or E1 Boards
T1 and E1 boards receive T1 and E1 data in frames. These
frames must be synchronized with the network clock. For this
reason, if a system contains an T1 or E1 board, that board must
set the MVIP clock from the signal received on the first or
second network trunk. All other boards in the system extract
their clock from the MVIP bus.
Setting the Clock for
RTNI-ATSI Boards
An RTNI-ATSI board sets the MVIP clock only if an T1 or E1 is
not present in the system. The RTNI-ATSI uses its internal
oscillator to generate the clock signal.
Setting the Clock for
Vantage PCI Boards
Vantage PCI boards set the MVIP clock only if an T1 or E1 is not
present in the system. The Vantage PCI board uses its internal
oscillator to drive the clock. Set the Vantage PCI board’s clock
using MVIP-95 functions described in Chapter 6, MVIP-95, on
page 183.
Setting the Clock for
Vantage VPS Boards
Vantage VPS boards set the MVIP clock only if an T1 or E1 is
not present in the system. The Vantage VPS board takes the
clock from the internal oscillator. Set the Vantage VPS board’s
clock using the RHT_SET_CLOCK function.
Setting the Clock for
RDSP and Vantage VRS
Boards
RDSP and Vantage VRS boards cannot set the MVIP clock.
They must retrieve the clock signal from the MVIP bus.