Datasheet

35
Dual-Core Intel® Xeon® Processor 5200 Series Electrical Specifications
Notes:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. Measured at 0.2*V
TT
.
3. V
OH
is determined by value of the external pullup resistor to V
TT
. Refer to platform design guide for details.
4. For V
IN
between 0 V and V
OH
.
2.13.2 V
CC
Overshoot Specification
The Dual-Core Intel® Xeon® Processor 5200 Series can tolerate short transient
overshoot events where V
CC
exceeds the VID voltage when transitioning from a high-
to-low current load condition. This overshoot cannot exceed VID + V
OS_MAX
(V
OS_MAX
is
the maximum allowable overshoot above VID). These specifications apply to the
processor die voltage as measured across the VCC_DIE_SENSE and VSS_DIE_SENSE
lands and across the VCC_DIE_SENSE2 and VSS_DIE_SENSE2 lands.
Notes:
1. VOS is the measured overshoot voltage.
2. TOS is the measured time duration above VID.
2.13.3 Die Voltage Validation
Core voltage (VCC) overshoot events at the processor must meet the specifications in
Table 2-17 when measured across the VCC_DIE_SENSE and VSS_DIE_SENSE lands
and across the VCC_DIE_SENSE2 and VSS_DIE_SENSE2 lands. Overshoot events that
are < 10 ns in duration may be ignored. These measurements of processor die level
overshoot should be taken with a 100 MHz bandwidth limited oscilloscope.
Table 2-17. V
CC
Overshoot Specifications
Symbol Parameter Min Max Units Figure Notes
V
OS_MAX
Magnitude of V
CC
overshoot above VID 50 mV 2-8
T
OS_MAX
Time duration of V
CC
overshoot above VID 25 µs 2-8
Figure 2-8. V
CC
Overshoot Example Waveform
Example Overshoot Waveform
0 5 10 15 20 25
Time [us]
Voltage [V]
VID - 0.000
VID + 0.050
V
OS
T
OS
T
OS
: Overshoot time above VID
V
OS
: Overshoot above VID