Datasheet

95
Features
Notes:
1. Processors running in the lowest bus ratio supported as shown in Table 2-1, will enter the HALT State when
the processor has executed the HALT or MWAIT instruction since the processor is already operating in the
lowest core frequency and voltage operating point.
2. The specification is at Tcase = 38
o
C and nominal Vcc. The VID setting represents the maximum expected
VID when running in HALT state.
3. The specification is at Tcase = 40
o
C and nominal Vcc. The VID setting represents the maximum expected
VID when running in HALT state.
The processor exits the Extended HALT state when a break event occurs. When the
processor exits the Extended HALT state, it will first transition the VID to the original
value and then change the bus to core frequency ratio back to the original value.
P
EXTENDED_HALT
Dual-Core Intel® Xeon®
Processor E5240
Extended HALT State
Power
8W 2
P
EXTENDED_HALT
Dual-Core Intel® Xeon®
Processor L5200 Series
Extended HALT State
Power
6W 2
P
EXTENDED_HALT
Dual-Core Intel® Xeon®
Processor L5238
Extended HALT State
Power
6W 3
Table 7-2. Extended HALT Maximum Power (Sheet 2 of 2)
Symbol Parameter Min Typ Max Unit Notes 1
Figure 7-1. Stop Clock State Machine
Extended HALT or HALT State
BCLK running
Snoops and interrupts allowed
Normal State
Normal execution
Extended HALT Snoop or HALT
Snoop State
BCLK running
Service snoops to caches
Stop Grant State
BCLK running
Snoops and interrupts allowed
Snoop
Event
Occurs
Snoop
Event
Serviced
INIT#, BINIT#, INTR, NMI, SMI#,
RESET#, FSB interrupts
STPCLK#
Asserted
STPCLK#
De-asserted
S
T
P
C
L
K
#
A
s
s
e
r
t
e
d
S
T
P
C
L
K
#
D
e
-
a
s
s
e
r
t
e
d
Snoop Event Occurs
Snoop Event Serviced
HALT or MWAIT Instruction and
HALT Bus Cycle Generated
Stop Grant Snoop State
BCLK running
Service snoops to caches