Datasheet

Datasheet 3
Contents
1Introduction..............................................................................................................9
1.1 Terminology .......................................................................................................9
1.1.1 Processor Terminology............................................................................10
1.2 References .......................................................................................................11
2 Electrical Specifications...........................................................................................13
2.1 Power and Ground Lands....................................................................................13
2.2 Decoupling Guidelines........................................................................................13
2.2.1 VCC Decoupling .....................................................................................13
2.2.2 Vtt Decoupling.......................................................................................13
2.2.3 FSB Decoupling......................................................................................14
2.3 Voltage Identification.........................................................................................14
2.4 Market Segment Identification (MSID) .................................................................16
2.5 Reserved, Unused, and TESTHI Signals ................................................................16
2.6 Voltage and Current Specification........................................................................17
2.6.1 Absolute Maximum and Minimum Ratings ..................................................17
2.6.2 DC Voltage and Current Specification........................................................19
2.6.3 Vcc Overshoot .......................................................................................21
2.6.4 Die Voltage Validation.............................................................................22
2.7 Signaling Specifications......................................................................................22
2.7.1 FSB Signal Groups..................................................................................23
2.7.2 CMOS and Open Drain Signals .................................................................24
2.7.3 Processor DC Specifications .....................................................................25
2.7.3.1 GTL+ Front Side Bus Specifications .............................................26
2.8 Clock Specifications...........................................................................................28
2.8.1 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking............................28
2.8.2 FSB Frequency Select Signals (BSEL[2:0]).................................................28
2.8.3 Phase Lock Loop (PLL) and Filter ..............................................................29
2.8.4 BCLK[1:0] Specifications (CK505 based Platforms) ..................................... 29
2.8.5 BCLK[1:0] Specifications (CK410 based Platforms) ..................................... 31
2.9 PECI DC Specifications.......................................................................................32
3 Package Mechanical Specifications ..........................................................................33
3.1 Package Mechanical Drawing...............................................................................33
3.2 Processor Component Keep-Out Zones.................................................................37
3.3 Package Loading Specifications ...........................................................................37
3.4 Package Handling Guidelines...............................................................................37
3.5 Package Insertion Specifications..........................................................................38
3.6 Processor Mass Specification...............................................................................38
3.7 Processor Materials............................................................................................38
3.8 Processor Markings............................................................................................38
3.9 Processor Land Coordinates................................................................................39
4 Land Listing and Signal Descriptions .......................................................................41
4.1 Processor Land Assignments...............................................................................41
4.2 Alphabetical Signals Reference............................................................................64
5 Thermal Specifications and Design Considerations ..................................................73
5.1 Processor Thermal Specifications.........................................................................73
5.1.1 Thermal Specifications............................................................................73
5.1.2 Thermal Metrology .................................................................................77
5.2 Processor Thermal Features................................................................................77
5.2.1 Thermal Monitor.....................................................................................77