Owner manual

Sparing mode

• In this mode, if the system detects degrading memory and did not

crash, the data in the failed channel will be copied to the spare

channel. The failed channel is then isolated and the spare channel

becomes active. However, any uncorrectable error that happens

before the isolation will still cause the system to stop normal

operation.

• Channel 3 is the spare channel. Therefore, the effective size will be

reduced by one-third.

• Follow the population rules described in the independent mode.

• Sparing mode requires that all three channels use identical DIMMs.

1A, 2A and 3A should be the same type, size and manufacturer,

likewise for 1B, 2B and 3B. The same rule applies to processor 2.

• Intel® Xeon® Processor 5500 Series CPUs do NOT support the

memory sparing mode.

Memory population for sparing mode

Single processor configuration

Notes: 1. Place DIMMs in “X” location.

2. DIMM population must correspond to the above tables.

3. DIMM modules support 1 GB, 2 GB and 4 GB DIMMs.

4. DIMM modules support 8 GB and 16 GB DIMMs (support

depends on availability).

5. Do not mix UDIMMs with RDIMMs.

6. 3-DIMM per channel configuration is only available for

single/dual rank RDIMM.

Channel 1

DIMM slots

Channel 2

DIMM slots

Channel 3

DIMM slots

Notes

Configuration 1C 1B 1A 2C 2B 2A 3C 3B 3A

AXXX

B XXXXXX

C XXXXXXXXXSR, DR RDIMMs only