Specifications

PC/II+p Board Technical Reference Manual 76
MT002615 ©1999-2001, Megatel Computer Corporation
7.29 Watchdog
PC/II+p contains a DS1706S Microprocessor Supervisor that provides a Watchdog timer function. The
Watchdog WDS# output is tied to RST# causing a CPU reset (of duration 200 microseconds minimum) to
occur when the watchdog timer triggers. For more detailed information about this part, please refer to the
Dallas Semiconductor DS1706 datasheet, listed in section 2
, "Reference Documents" in this document.
A optional jumper (J014) is included on the PC/II+p between WDS# and RST# to allow the Watchdog timer
output to be permanently disabled. Remove the jumper (open) to disable Watchdog reset output, or install
the jumper (closed) to enable watchdog reset output. The jumper should be removed if the watchdog timer is
NEVER used.
When jumper J014 is inserted (closed), the Watchdog timer can be set to Watchdog Enabled mode or
Watchdog Disabled mode. By default at boot time, it is programmed by the BIOS to be in Watchdog Disabled
mode.
To allow the Watchdog timer to trigger and cause a CPU reset, the Watchdog jumper must be inserted, the
Watchdog timer must be in the Watchdog Enabled mode, and a strobe to the Watchdog timer must NOT
have been issued for a duration of 1 second.
7.29.1 Watchdog Modes
The Watchdog timer hardware is always running, and whether or not a timer expiry occurs depends upon
which mode the PC/II+p hardware has been set and the actions of the application:
Watchdog Disabled Mode.
When the Watchdog timer is in Watchdog Disabled mode, the PC/II+p hardware automatically issues
strobes to the Watchdog timer at a frequency of 2 Hz to prevent timer expiry. In this mode, the Watchdog
timer never expires, therefore the Watchdog timer is effectively disabled. This is the default mode
programmed into the PC/II+p hardware by the BIOS at boot time. This mode is also set by using the
WatchdogDisable() function.
Watchdog Enabled Mode.
When the Watchdog timer is in Watchdog Enabled mode, the PC/II+p hardware does NOT automatically
issue strobes to the Watchdog timer. The application program must therefore issue strobes at a frequency
of at least 1 Hz or better, to keep the Watchdog timer from expiring. Expiry of the Watchdog timer in this
mode will cause the system to be forced into RESET unless the application continues to issue strobes, or
exits from this mode. The application calls the function WatchdogStrobe() once for each strobe that is to
be issued to the Watchdog timer. This mode is set by using the WatchdogEnable() function. Use the
function WatchdogDisable() to exit from this mode.
7.29.2 Watchdog functions
There are three bios functions for the watchdog timer – WatchdogEnable(), WatchdogDisable(), and
WatchdogStrobe(). WatchdogEnable() and WatchdogDisable() set the Watchdog timer hardware into
Watchdog Enabled and Watchdog Disabled modes, respectively. WatchdogStrobe() issues one strobe to the
Watchdog timer.