Owner's manual

Revision: 1.0
42
3.4.2 SRAM Memory Address Map
The following table shows the SRAM Memory Address map (max. 1024 KB) and their
offset addresses, relative to the “PCI Base Address 0”. To access SRAM memory, user
must use Byte-Access command.
32 bit Data width
Memory Offset
Address
31
24
23
16
15
8
7
0
Software
Readable
Software
Writable
00h Byte 3 Byte 2 Byte 1 Byte 0 Yes Yes
04h Byte 7 Byte 6 Byte 5 Byte 4 Yes Yes
08h Byte 11 Byte 10 Byte 9 Byte 8 Yes Yes
....
.... .... .... ....
Yes Ye s
.... .... .... .... ....
Yes Ye s
FFFF4h Byte 8183 Byte 8182 Byte 8181 Byte 8180 Yes Yes
FFFF8h Byte 8187 Byte 8186 Byte 8185 Byte 8184 Yes Yes
FFFFCh Byte 8191 Byte 8190 Byte 8189 Byte 8188 Yes Yes
Note: 2019 has only 256KB SRAM and 2019A has 2×512KB SRAMs