AR-B9612 User’s Guide Version : 2.
1. OVERVIEW This chapter provides an overview of your system features and capabilities. The following topics are covered: l l l Introduction Packing List Features 1.1 INTRODUCTION The AR-B9612 PC/104, CPU module is a lower power consuming, high performance 386 based computer. By using the space saving features of the ALI M6117 CPU, this module is able to support up to 4MB’s of DRAM and 1.5 MB’s of Flash memory on board.
1.2 PACKING LIST The accessories are included with the system. Before you begin installing your AR-B9612 board, take a moment to make sure that the following items have been included inside the AR-B9612 package.
1.3 FEATURES The system provides a number of special features that enhance its reliability, ensure its availability, and improve its expansion capabilities, as well as its hardware structure. l l l l l l l l l l l l 80386SX-33/40 MHz CPU PC/104 extension bus Up to 4MB DRAM system Supports 2 RS-232C/RS-485 serial port PC/AT compatible keyboard interface Supports up to 1.
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2. SYSTEM CONTROLLER This chapter describes the major structure. topics are covered: l l l l l l l l l The following Microprocessor DMA Controller I/O Port Address Map Interrupt Controller Serial Port Real-Time Clock and Non-Volatile RAM Timer Watch-Dog Timer FLASH Disk 2.1 MICROPROCESSOR The AR-B9612 use the ALI M6117 CPU, it is designed to perform like Intel’s 386SX system with deep green features. The 386SX core is the same as M1386SX of Acer Labs. Inc.
2.2 DMA CONTROLLER The equivalent of two 8237A DMA controllers are implemented in the AR-B9612 card. Each controller is a four channel DMA device which will generate the memory addresses and control signals necessary to transfer information directly between a peripheral device and memory. This allows high speed information transfer with less CPU intervention.
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2.4 INTERRUPT CONTROLLER The ALI’s M6 117 also provides two cascaded 8259 Programmable Interrupt Controllers (PIC). They accept requests from peripherals, resolve priorities on pending interrupts in service, issue interrupt requests to the CPU, and provide vectors which are used as acceptance indices by the CPU to determine which interrupt service routine to execute.
2.5 SERIAL PORT The ACEs (Asynchronous Communication Elements ACE1 to ACE4) are used to convert parallel data to a serial format on the transmit side and convert serial data to parallel on the receiver side. The serial format, in order of transmission and reception, is a start bit, followed by five to eight data bits, a parity bit (if programmed) and one, one and half (five-bit format only) or two stop bits.
(1) Receiver Buffer Register (RBR) Bit 0-7: Received data byte (Read Only) (2) Transmitter Holding Register (THR) Bit 0-7: Transmitter holding data byte (Write Only) (3) Interrupt Enable Register (IER) Bit 0: Enable Received Data Available Interrupt (ERBFI) Bit 1: Enable Transmitter Holding Empty Interrupt (ETBEI) Bit 2: Enable Receiver Line Status Interrupt (ELSI) Bit 3: Enable MODEM Status Interrupt (EDSSI) Bit 4: Must be 0 Bit 5: Must be 0 Bit 6: Must be 0 Bit 7: Must be 0 (4) Interrupt Identification
(6) MODEM Control Register (MCR) Bit 0: Data Terminal Ready (DTR) Bit 1: Request to Send (RTS) Bit 2: Out 1 (OUT 1) Bit 3: Out 2 (OUT 2) Bit 4: Loop Bit 5: Must be 0 Bit 6: Must be 0 Bit 7: Must be 0 (7) Line Status Register (LSR) Bit 0: Data Ready (DR) Bit 1: Overrun Error (OR) Bit 2: Parity Error (PE) Bit 3: Framing Error (FE) Bit 4: Break Interrupt (BI) Bit 5: Transmitter Holding Register Empty (THRE) Bit 6: Transmitter Shift Register Empty (TSRE) Bit 7: Must be 0 (8) MODEM Status Register (MSR) Bit 0:
(9) Divisor Latch (LS, MS) Bit 0: Bit 1: Bit 2: Bit 3: Bit 4: Bit 5: Bit 6: Bit 7: Desired Baud Rate 50 75 110 134.5 150 300 600 1200 1800 2000 2400 3600 4800 7200 9600 14400 19200 28800 38400 57600 LS Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Divisor Used to Generate 16x Clock 2304 1536 1047 857 768 384 192 96 64 58 48 32 24 16 12 8 6 4 3 2 MS Bit 8 Bit 9 Bit 10 Bit 11 Bit 12 Bit 13 Bit 14 Bit 15 Present Error Difference Between Desired and Actual ----0.026 0.058 ----------0.
2.6 REAL-TIME CLOCK AND NON-VOLATILE RAM The AR-B9612 contains a real-time clock compartment that maintains the date and time in addition to storing configuration information about the computer system. It contains 14 bytes of clock and registers and 50 bytes of general purpose RAM. Because of the use of CMOS technology, it consumes very little power and can be maintained for long period of time using an internal lithium battery.
Address 17 18 19-2D 2E-2F 30 31 32 33 34-7F Description Low expansion memory byte High expansion memory byte Reserved 2-byte CMOS checksum Low actual expansion memory byte High actual expansion memory byte Date century byte Information flags (set during power on) Reserved for system BIOS Table 2-5 Real-Time Clock & Non-Volatile RAM 2.7 TIMER The AR-B9612 provides three programmable timers, each with a timing frequency of 1.19 MHz. Timer 0 The output of this timer is tied to interrupt request 0.
2.8 WATCH-DOG TIMER The watchdog timer is a circuit that may be used from your program software to detect crashes or hang-ups. Once you have enabled the watchdog timer, your program must trigger the watchdog timer every time before it times-out. After you trigger the watchdog timer, it will be set to zero and start to count again. If your program fails to trigger the watchdog timer before time-out, it will generate a reset pulse to reset the system.
2.8.2 Trigger Watchdog Timer After you enable the watchdog timer, your program must trigger the watchdog at least once every time-out period. The factor of the watchdog timer time-out constant is approximately 1.6 seconds, the trigger way just is the activity of read I/O, and not care the reading number. Below is a BASICA program which demonstrates how to trigger the watchdog timer: 2000 2010 2020 2030 REM Points to I/O port address WD_REG% = I/O_PORT REM Input factor to watchdog WD=INP(WD_REG%) ,etc. 2.
2.9 FLASH DISK The AR-B9612 provides three 32-pin JEDEC DIP sockets may be populated with up to 1.5MB FLASH. It is ideal for diskless system, high reliability and/or high speed access applications, controller for industrial or line test instruments, etc. 2.9.1 Configuration FLASH function enables you to use 5V FLASH, allowing you to directly program the ROM disk without having to purchase any additional programming equipment to write or erase data.
Software Programming You can use the DOS and command to format and copy files. Follow the following steps to format and copy files to the FLASH disk. Step 1: Turn on your computer, when the screen shows the SSD BIOS menu, please hit the [F1] key during the system boot-up, this enables you to enter the FLASH setup program. Step 2: Use , , , and arrow keys to select the correct FLASH memory type and how many memory chips are going to be used.
3. SETTING SYSTEM This section describes pin assignments for system’s external connectors and the jumper settings. l l Overview System Setting 3.1 OVERVIEW The AR-B9612 is one small, easy use, and single 386SX CPU board with 2 RS-232/RS-485. This section provides hardware’s jumpers setting, and the connectors locations and the pin assignment.
3.2 SYSTEM SETTING Jumper pins allow you to set specific system parameters. Set them by changing the pin location of jumper blocks. (A jumper block is a small plastic-encased conductor [shorting plug] that slips over the pins.) To change a jumper setting, remove the jumper from its current location with your fingers or small needle-nosed pliers. Place the jumper over the two pins designated for the desired setting. Press the jumper evenly onto the pins. Be careful not to bend the pins.
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(2) 64 Pin PC/104 Connector Bus A & B (CN2) CN2 1 -IOCHCK --SD7 --SD6 --SD5 --SD4 --SD3 --SD2 --SD1 --SD0 ---IORDY--AEN --SA19 --SA18 --SA17 --SA16 --SA15 --SA14 --SA13 --SA12 --SA11 --SA10 --SA9 --SA8 --SA7 --SA6 --SA5 --SA4 --SA3 --SA2 --SA1 --SA0 --GND --- A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 2 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 --- GND
(3) I/O Channel Signal Description Name Description BUSCLK [Output] The BUSCLK signal of the I/O channel is asynchronous to the CPU clock. RSTDRV [Output] This signal goes high during power-up, low line-voltage or hardware reset SA0 - SA19 The System Address lines run from bit 0 to 19.
Name Description DRQ 0-3, 5-7 [Input] DMA Request channels 0 to 3 are for 8-bit data transfers. DMA Request channels 5 to 7 are for 16-bit data transfers. DMA request should be held high until the corresponding DMA has been completed.
3.2.2 Keyboard Connector (J1) J1 is a 6-pin mini-DIN keyboard connector. This keyboard connector is PS/2 type keyboard compatible. An PC/AT compatible keyboard can be used with the AR-B9612 card. 6 Pin Mini-Din J1 1 KB CLOCK 2 KB DATA 2 3 VCC 1 4 GROUND 1 4 3 2 3 5 1 2 4 3 6 4 5 6 DATA N.C. GND VCC CLOCK N.C. Figure 3-4 J1:Keyboard Connector CAUTION : The keyboard adapter cable’s pinouts must map to the keyboard connector’s pins.
3.2.3 Speaker Header (J2) The AR-B9612 provides a 2-pin header type connector for supporting up to the speaker. 1 Speaker+ 1 2 2 Speaker- Figure 3-5 J2:Speaker Header 3.2.4 Power Connector (J3) J3 is a 4 pin power connector, you can directly connect the power supply to the on board power connector for stand alone applications.
3.2.5 Serial Port (1) Serial Port Mode Select (J8) Jumper pins allow you to set specific system parameters. Set them by changing the pin location of jumper blocks. (A jumper block is a small plastic-encased conductor [shorting plug] that slips over the pins.) To change a jumper setting, remove the jumper from its current location with your fingers or small needle-nosed pliers. Place the jumper over the two pins designated for the desired setting. Press the jumper even onto the pins.
(3) RS-232C Connector (J6 & J7) J6 is used to connect the COM A port RS-232 selected, the I/O port default address is 3F8H. J7 is used to connect the COM B port RS-232 selected, the I/O port default address is 2F8H. 1 -DCD 2 -DSR 3 RXD 10 4 -RTS 9 5 TXD 6 -CTS 7 -DTR 8 -RI 9 GND 9 10 N.C. 2 1 6 1 COM-A/B RS-232 5 Figure 3-9 J6 & J7 : COM A & COM B RS-232 3.2.6 Reset Connector (J9) J9 is used to connect to an external reset switch. these two pins will reset the system.
3.2.7 CPU Base Clock Select (JP1) This board provides three types of CPU clock for selecting, there is 25MHz, 33MHz, & 40MHz for choice. The CPU input clock is twice of operation clock. CPU Input Clock CPU Operation Clock 50MHz 25MHz 66.6MHz 80MHz 33.3MHz 40MHz Table 3-2 CPU Clock 2 1 4 3 2 1 50MHz 4 3 66.6MHz 2 1 4 3 80MHz Factory Presetting Figure 3-11 JP1 : CPU Base Clock NOTE : The frequency of input clock is selected by JP1, it is twice of CPU clock.
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4. AR-B9612 BIOS CONSOLE This chapter describes the BIOS menu displays and explains how to perform common tasks needed to get up and running. And presents detailed explanations of the elements found in each of the BIOS menus. The following topics are covered: l l l l l l l BIOS Setup Overview Standard CMOS Setup Advanced CMOS Setup Advanced Chipset Setup Password Setting Load Default Setting BIOS Exit 4.
AMIBIOS HIFLEX SETUP UTILITIES (C) 1998 American Megatrends, Inc. All Rights Reserved Standard CMOS Setup Advanced CMOS Setup Advanced Chipset Setup Peripheral Setup Auto-Detect Hard Disks Change User Password Change Supervisor Password Auto Configuration with Optimal Settings Auto Configuration with Fail Safe Settings Save Settings and Exit Exit Without Saving Standard CMOS setup for changing time, date, hard disk type, etc.
3. The BIOS settings are described in detail in this section. 4.2 STANDARD CMOS SETUP The option allows you to record some basic system hardware configuration and set the system clock and error handling. If the CPU board is already installed in a working system, you will not need to select this option anymore. AMIBIOS SETUP - STANDARD CMOS SETUP (C) 1995 American Megatrends, Inc.
Figure 4-2 BIOS : Standard CMOS Setup 4-4 AR-B9612 User’s Guide
4.2.1 Time Setup To highlight the field and then press the [Page Up] /[Page Down] or [+]/[-] keys to set the current date. Follow the month, day and year format. To highlight the
4.2.3 Hard Disk Setup The BIOS supported 48 types for user setting, The BIOS supported and two items that user can install up to two hard disks. The master and slave jumper adjusting, please refer to the hard disk’s installation description and the hard disk jumper setting. CAUTION: AR-B9612 can not support the 32Bit Transfer, so Acrosser recommends user configure the <32Bit> field is always [Off], not setting [On]. You can select under the and fields.
4.3 ADVANCED CMOS SETUP The option consists of configuration entries that allow you to improve your system performance, or let you set up some system features according to your preference. Some entries here are required by the CPU board’s design to remain in their default settings. AMIBIOS SETUP - ADVANCED CMOS SETUP (C) 1995 American Megatrends, Inc.
4.3.1 BootUp and Floppy (1) BootUp Sequence The option determines where the system looks first for an operating system. The default setting is to check first the hard disk and then the floppy drive, and last the CDROM. (2) BootUp Num-Lock The item is used to active the Num Lock function upon system boot. If the setting is on, after user booted computer, the light of Num Lock is bright, and user can use the number key.
4.3.2 Keyboard, VGA & Password (1) Typematic Rate This item specifies the speed at which a keyboard keystroke is repeated. (2) System keyboard This function specifies that a keyboard is attached to the computer. (3) Primary Display The option is used to set the type of video display card installed in system. (4) Password Check This option enables password checking every time the computer is powered on or every time BIOS Setup is executed.
4.3.3 System (1) Wait for ‘F1’ If Error AMIBIOS POST error messages are followed by: Press to continue If this option is set to Disabled, AMIBIOS does not wait for you to press the key after an error message. (2) Hit ‘DEL’ Message Display Set this options to Disabled to prevent the message as follows: Hit ‘DEL’ if you want to run Setup It will prevent the message from appearing on the first BIOS screen when the computer boots.
4.4 ADVANCED CHIPSET SETUP This option controls the configuration of the board’s chipset. Control keys for this screen are the same as for the previous screen. AMIBIOS SETUP - ADVANCED CHIPSET SETUP (C) 1995 American Megatrends, Inc. All Rights Reserved AT Bus Clock 14.318 / 2 Slow Refresh 60 us RAS Precharge time 1.
(1) AT Bus Clock This option sets the polling clock speed of ISA Bus (PC/104). Note: 1. PCLK means the CPU inputs clock. 2. Acrosser recommends user setting at the range of 8MHz to 10MHz. (2) Slow Refresh This option sets the DRAM refresh cycle time. (3) RAS Precharge time The DRAM RAS precharge time. (4) Time Insert Wait The DRAM time insert wait: RAS Active and CAS Precharge function setting. (5) ISA High Speed The Speed field shows the speed at which the processor runs internally.
4.5 PERIPHERAL SETUP AMIBIOS SETUP – PERIPHERAL SETUP (C) 1998 American Megatrends, Inc.
4.6 PASSWORD SETTING This BIOS Setup has an optional password feature. The system can be configured so that all users must enter a password every time the system boots or when BIOS Setup is executed. User can set either a Supervisor password or a User password. 4.6.1 Setting Password Select the appropriate password icon (Supervisor or User) from the Security section of the BIOS Setup main menu. Enter the password and press [Enter]. The screen does not display the characters entered.
password. when typed. The password does not appear on the screen Make sure you write it down. 4.7 LOAD DEFAULT SETTING In this section permit user to select a group of setting for all BIOS Setup options. Not only can you use these items to quickly set system configuration parameters, you can choose a group of setting s that have a better chance of working when the system is having configuration related problems. 4.7.
4.8 BIOS EXIT This section is used to exit the BIOS main menu in two type situation. After making your changes, you can either save them or exit the BIOS menu and without saving the new values. 4.8.1 Save Settings and Exit This item set in the , , and the new password (if it has been changed) will be stored in the CMOS.The CMOS checksum is calculated and written into the CMOS.
