LSM303DLHC Ultra compact high performance e-compass 3D accelerometer and 3D magnetometer module Preliminary data Features ■ 3 magnetic field channels and 3 acceleration channels ■ From ±1.3 to ±8.1 gauss magnetic field fullscale ■ ±2g/±4g/±8g/±16g selectable full-scale ■ 16 bit data output ■ I2C serial interface ■ Analog supply voltage 2.16 V to 3.
Contents LSM303DLHC Contents 1 2 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Module specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1 Sensor characteristics . . . . . . . . .
LSM303DLHC 7 Contents Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.1 7.2 Linear acceleration register description . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.1.1 CTRL_REG1_A (20h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.1.2 CTRL_REG2_A (21h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.1.3 CTRL_REG3_A (22h) . . . . . . . . . . . . . . . . . . . . .
Contents LSM303DLHC 7.2.8 IR_REG_M (0Ah/0Bh/0Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 7.2.9 TEMP_OUT_H_M (31h), TEMP_OUT_L_M (32h) . . . . . . . . . . . . . . . . 39 8 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LSM303DLHC List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46. Table 47.
List of tables Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. Table 71. Table 72. Table 73. Table 74. Table 75. Table 76. Table 77. Table 79. Table 80. Table 81. Table 82. Table 83. Table 84. Table 85. Table 86. Table 87. 6/42 LSM303DLHC INT2_CFG_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LSM303DLHC Block diagram and pin description 1 Block diagram and pin description 1.1 Block diagram Figure 1. Block diagram Sensing Block Sensing Interface A/D converter Control Logic X+ Y+ CHARGE AMPLIFIER Z+ I (a) + MUX SDA Z- SCL DI I2C YX- INT2 X+ CHARGE AMPLIFIER Y+ I (M) INT1 Z+ + MUX ZYX- INTERRUPT GEN.
Block diagram and pin description 1.2 LSM303DLHC Pin description Figure 2. Pin connection Z 1 Y X DIRECTION OF DETECTABLE ACCELERATIONS 13 6 1 6 13 8 8 TOP VIEW Z 1 Y X 13 6 BOTTOM VIEW DIRECTION OF DETECTABLE MAGNETIC FIELDS 8 TOP VIEW AM09237V1 Table 2.
LSM303DLHC Module specifications 2 Module specifications 2.1 Sensor characteristics @ Vdd = 2.5 V, T = 25 °C unless otherwise noted(a). Table 3. Symbol LA_FS M_FS LA_So M_GN Sensor characteristics Parameter Linear acceleration measurement range(2) Magnetic measurement range Linear acceleration sensitivity Magnetic gain setting Test conditions Min. Typ.(1) FS bit set to 00 ±2 FS bit set to 01 ±4 FS bit set to 10 ±8 FS bit set to 11 ±16 GN bits set to 001 ±1.
Module specifications Table 3. LSM303DLHC Sensor characteristics (continued) Parameter Test conditions LA_TCSo Linear acceleration sensitivity change vs. temperature FS bit set to 00 ±0.01 %/°C LA_TyOff Linear acceleration typical Zero-g level offset accuracy(3),(4) FS bit set to 00 ±60 mg LA_TCOff Linear acceleration Zero-g level change vs. temperature Max. delta from 25 °C ±0.5 mg/°C LA_An Acceleration noise density FS bit set to 00, normal mode(Table 8.
LSM303DLHC 2.3 Module specifications Electrical characteristics @ Vdd = 2.5 V, T = 25 °C unless otherwise noted. Table 5. Electrical characteristics Test conditions Symbol Parameter Min. Vdd Supply voltage 2.16 Vdd_IO Module power supply for I/O 1.71 Idd Current consumption in normal mode(2) IddSL Current consumption in sleep-mode(3) Top Operating temperature range - -40 Typ.(1) 1.8 Max. Unit 3.6 V Vdd+0.1 110 µA 1 µA +85 °C 1. Typical specifications are not guaranteed. 2.
Module specifications 2.4 LSM303DLHC Communication interfaces characteristics External pull-up resistors are required to support I2C standard and fast speed modes. Sensor I2C - inter IC control interface 2.4.1 Subject to general operating conditions for Vdd and Top. Table 6. I2C slave timing values I2C standard mode (1) Symbol I2C fast mode (1) Parameter Unit Min. Max. Min. Max. 100 0 400 f(SCL) SCL clock frequency 0 tw(SCLL) SCL clock low time 4.7 1.
LSM303DLHC 2.5 Module specifications Absolute maximum ratings Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 7. Absolute maximum ratings Symbol Ratings Maximum value Unit Vdd Supply voltage -0.3 to 4.8 V Vdd_IO I/O pins supply voltage -0.
Module specifications LSM303DLHC 2.6 Terminology 2.6.1 Linear acceleration sensitivity Linear acceleration sensitivity describes the gain of the accelerometer sensor and can be determined by applying 1 g acceleration to it. As the sensor can measure DC accelerations, this can be done easily by pointing the axis of interest towards the center of the Earth, noting the output value, rotating the sensor by 180 degrees (pointing to the sky) and noting the output value again.
LSM303DLHC 3 Functionality Functionality The LSM303DLHC is a system-in-package featuring a 3D digital linear acceleration and 3D digital magnetic field detection sensor. The system includes specific sensing elements and an IC interface capable of measuring both the linear acceleration and magnetic field applied on it and to provide a signal to the external world through an I2C serial interface with separated digital output.
Application hints 4 LSM303DLHC Application hints Figure 4. LSM303DLHC electrical connection Vdd_IO Vdd Vdd I2C bus Z Rpu C3 = 10uF 1 Y Rpu 10kOhm 10kOhm X C1=4.7uF 13 C4 = 100nF SCL SDA 8 INT2 C1 INT1 6 6 1 TOP VIEW TOP VIEW Z 8 1 Y 13 DRDY X 13 6 C2=0.22uF 8 TOP VIEW GND Digital signal from/to signal controller.Signals levels are defined by proper selection of Vdd AM09239V1 4.
LSM303DLHC 4.3 Application hints Digital interface power supply This digital interface, dedicated to the linear acceleration and to the magnetic field signal, is capable of operating with a standard power supply (Vdd) or using a dedicated power supply (Vdd_IO). 4.4 Soldering information The LGA package is compliant with the ECOPACK®, RoHS, and “Green” standard. It is qualified for soldering heat resistance according to JEDEC J-STD-020. Leave “Pin 1 Indicator” unconnected during soldering.
Digital interfaces 5 LSM303DLHC Digital interfaces The registers embedded inside the LSM303DLHC are accessible through two separate I2C serial interfaces, one for the accelerometer core and one for the magnetometer core. Table 9. Serial interface pin description PIN Name 5.1 PIN Description SCL I2 SDA I2C serial data (SDA) C serial clock (SCL) I2C serial interface The LSM303DLHC I2C is a bus slave. The I2C is employed to write the data into the registers whon also be read back.
LSM303DLHC 5.1.1 Digital interfaces I2C operation The transaction on the bus is started through a START (ST) signal. A START condition is defined as a HIGH to LOW transition on the data line while the SCL line is held HIGH. After this has been transmitted by the master, the bus is considered busy.
Digital interfaces 5.1.2 LSM303DLHC Linear acceleration digital interface For linear acceleration the default (factory) 7-bit slave address is 0011001b. The slave address is completed with a Read/Write bit. If the bit is ‘1’ (read), a repeated START (SR) condition must be issued after the two sub-address bytes; if the bit is ‘0’ (write) the master transmits to the slave with the direction unchanged. Table 14 explains how the ead/write bit pattern is composed, listing all the possible configurations.
LSM303DLHC 5.1.3 Digital interfaces Magnetic field digital interface For magnetic sensors the default (factory) 7-bit slave address is 0011110xb. The slave address is completed with a Read/Write bit. If the bit is ‘1’ (read), a repeated START (SR) condition must be issued after the two sub-address bytes; if the bit is ‘0’ (write) the master transmits to the slave with the direction unchanged. Table 16 explains how the SAD is composed. Table 16.
Register mapping 6 LSM303DLHC Register mapping Table 17 provides a listing of the 8-bit registers embedded in the device and the related addresses: Table 17.
LSM303DLHC Table 17.
Register description 7 LSM303DLHC Register description The device contains a set of registers which are used to control its behavior and to retrieve acceleration data. The register address, made up of 7 bits, is used to identify them and to write the data through the serial interface. 7.1 Linear acceleration register description 7.1.1 CTRL_REG1_A (20h) Table 18. CTRL_REG1_A register ODR3 ODR2 Table 19. ODR1 ODR0 LPen Zen Yen Xen CTRL_REG1_A description Data rate selection.
LSM303DLHC Register description Table 20. Data rate configuration (continued) ODR3 7.1.2 ODR2 ODR0 Power mode selection 1 0 0 0 Low-power mode (1.620 KHz) 1 0 0 1 Normal (1.344 kHz) / low-power mode (5.376 KHz) CTRL_REG2_A (21h) Table 21. CTRL_REG2_A register HPM1 HPM0 Table 22. HPCF2 HPCF1 FDS HPCLICK HPIS2 HPIS1 CTRL_REG2_A description HPM1 -HPM0 High pass filter mode selection.
Register description Table 25. 7.1.4 LSM303DLHC CTRL_REG3_A description I1_CLICK CLICK interrupt on INT1. Default value 0. (0: disable, 1: enable) I1_AOI1 AOI1 interrupt on INT1. Default value 0. (0: disable, 1: enable) I1_AOI2 AOI2 interrupt on INT1. Default value 0. (0: disable, 1: enable) I1_DRDY1 DRDY1 interrupt on INT1. Default value 0. (0: disable, 1: enable) I1_DRDY2 DRDY2 interrupt on INT1. Default value 0. (0: disable, 1: enable) I1_WTM FIFO watermark interrupt on INT1.
LSM303DLHC Table 29. 7.1.6 Register description CTRL_REG5_A description BOOT Reboot memory content. Default value: 0 (0: normal mode, 1: reboot memory content) FIFO_EN FIFO enable. Default value: 0 (0: FIFO disable, 1: FIFO enable) LIR_INT1 Latch interrupt request on INT1_SRC register, with INT1_SRC register cleared by reading INT1_SRC itself. Default value: 0.
Register description Table 33. LSM303DLHC REFERENCE_A register description Ref 7-Ref0 7.1.8 STATUS_REG_A (27h) Table 34. ZYXOR Table 35. 7.1.9 Reference value for interrupt generation. Default value: 0 STATUS_A register ZOR YOR XOR ZYXDA ZDA YDA STATUS_A register description ZYXOR X, Y, and Z axis data overrun. Default value: 0 (0: no overrun has occurred, 1: a new set of data has overwritten the previous ones) ZOR Z axis data overrun.
LSM303DLHC 7.1.12 Register description FIFO_CTRL_REG_A (2Eh) Table 36. REFERENCE_A register FM1 FM0 Table 37. TR FTH4 FM1-FM0 FIFO mode selection. Default value: 00 (see Table 38) TR Trigger selection.
Register description Table 41. LSM303DLHC INT1_CFG_A description (continued) YHIE/ YUPE Enable interrupt generation on Y high event or on direction recognition. Default value: 0 (0: disable interrupt request, 1: enable interrupt request.) YLIE/ YDOWNE Enable interrupt generation on Y low event or on direction recognition. Default value: 0 (0: disable interrupt request, 1: enable interrupt request.) XHIE/ XUPE Enable interrupt generation on X high event or on direction recognition.
LSM303DLHC Register description Table 44. INT1_SRC_A description (continued) YL Y low. Default value: 0 (0: no interrupt, 1: Y low event has occurred) XH X high. Default value: 0 (0: no interrupt, 1: X high event has occurred) XL X low. Default value: 0 (0: no interrupt, 1: X low event has occurred) Interrupt 1 source register. Read only register.
Register description Table 50. LSM303DLHC INT2_CFG_A description AOI AND/OR combination of interrupt events. Default value: 0 (see Table 51) 6D 6-direction detection function enabled. Default value: 0 (refer to Table 51) ZHIE Enable interrupt generation on Z high event. Default value: 0 (0: disable interrupt request, 1: enable interrupt request on measured accel. value higher than preset threshold) ZLIE Enable interrupt generation on Z low event.
LSM303DLHC Register description Table 53. INT2_SRC_A description IA Interrupt active. Default value: 0 (0: no interrupt has been generated, 1: one or more interrupts have been generated) ZH Z high. Default value: 0 (0: no interrupt, 1: Z high event has occurred) ZL Z low. Default value: 0 (0: no interrupt, 1: Z low event has occurred) YH Y high. Default value: 0 (0: no interrupt, 1: Y high event has occurred) YL Y low. Default value: 0 (0: no interrupt, 1: Y low event has occurred) XH X high.
Register description LSM303DLHC D6 - D0 bits set the minimum duration of the Interrupt 2 event to be recognized. Duration time steps and maximum values depend on the ODR chosen. 7.1.22 CLICK_CFG_A (38h) Table 58. -- Table 59. 7.1.23 ZD ZS YD YS XD XS CLICK_CFG_A description ZD Enable interrupt double CLICK on Z axis. Default value: 0 (0: disable interrupt request, 1: enable interrupt request on measured accel. value higher than preset threshold) ZS Enable interrupt single CLICK on Z axis.
LSM303DLHC Table 61. 7.1.24 Register description CLICK_SRC_A description (continued) Z Z CLICK-CLICK detection. Default value: 0 (0: no interrupt, 1: Z high event has occurred) Y Y CLICK-CLICK detection. Default value: 0 (0: no interrupt, 1: Y high event has occurred) X X CLICK-CLICK detection. Default value: 0 (0: no interrupt, 1: X high event has occurred) CLICK_THS_A (3Ah) Table 62. -- Table 63.
Register description LSM303DLHC 1 LSB = 1/ODR. TLA7 through TLA0 define the time interval that starts after the first click detection where the click detection procedure is disabled, in cases where the device is configured for double click detection. 7.1.27 TIME WINDOW_A (3Dh) Table 68. TW7 TIME_WINDOW_A register TW6 TW5 TW4 Table 69. TIME_WINDOW_A description TW7-TW0 CLICK-CLICK time window TW3 TW2 TW1 TW0 1 LSB = 1/ODR.
LSM303DLHC Register description Table 72. 7.2.2 Data rate configurations (continued) DO2 DO1 DO0 Minimum data output rate (Hz) 1 1 0 75 1 1 1 220 CRB_REG_M (01h) Table 73. CRA_REG register GN2 GN1 GN0 0(1) 0(1) 0(1) 0(1) 0(1) 1. This bit must be set to ‘0’ for correct working of the device. Table 74. CRA_REG description Gain configuration bits. The gain configuration is common for all channels (refer to Table 75) GN1-0 Table 75. GN2 7.2.
Register description Table 78. 7.2.4 LSM303DLHC Magnetic sensor operating mode MD1 MD0 Mode 0 0 Continuous-conversion mode 0 1 Single-conversion mode 1 0 Sleep-mode. Device is placed in sleep-mode 1 1 Sleep-mode. Device is placed in sleep-mode OUT_X_H_M (03), OUT_X_LH_M (04h) X-axis magnetic field data. The value is expressed as 2’s complement. 7.2.5 OUT_Z_H_M (05), OUT_Z_L_M (06h) Z-axis magnetic field data. The value is expressed as 2’s complement. 7.2.
LSM303DLHC 7.2.9 Register description TEMP_OUT_H_M (31h), TEMP_OUT_L_M (32h) Table 84. TEMP11 Table 85. TEMP3 Table 86. TEMP11-0 TEMP_OUT_H_M register TEMP10 TEMP9 TEMP8 TEMP7 TEMP6 TEMP5 TEMP4 -- -- -- -- TEMP_OUT_L_M register TEMP2 TEMP1 TEMP0 TEMP_OUT resolution Temperature data (8LSB/deg - 12-bit resolution). The value is expressed as 2’s complement.
Package information 8 LSM303DLHC Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions, and product status are available at: www.st.com. ECOPACK is an ST trademark. Figure 5. LGA-14: mechanical data and package dimensions Dimens ions R ef. mm Min. Typ. A1 Max. Outline and mec hanic al data 1 A2 0.785 A3 0.16 0.2 0.
LSM303DLHC 9 Revision history Revision history Table 87. Document revision history Date Revision 21-Apr-2011 1 Changes Initial release.
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