Datasheet

LSM303DLHC Register description
Doc ID 018771 Rev 1 29/42
7.1.12 FIFO_CTRL_REG_A (2Eh)
7.1.13 FIFO_SRC_REG_A (2Fh)
7.1.14 INT1_CFG_A (30h)
Table 36. REFERENCE_A register
FM1 FM0 TR FTH4 FTH3 FTH2 FTH1 FTH0
Table 37. REFERENCE_A register description
FM1-FM0
FIFO mode selection. Default value: 00 (see
Table 38)
TR Trigger selection. Default value: 0
0: trigger event linked to trigger signal on INT1
1: trigger event linked to trigger signal on INT2
FTH4:0 Default value: 0
Table 38. FIFO mode configuration
FM1 FM0 FIFO mode configuration
0 0 Bypass mode
0 1 FIFO mode
1 0 Stream mode
1 1 Trigger mode
Table 39. FIFO_SRC_A register
WTM OVRN_FIFO EMPTY FSS4 FSS3 FSS2 FSS1 FSS0
Table 40. INT1_CFG_A register
AOI 6D ZHIE/
ZUPE
ZLIE/
ZDOWNE
YHIE/
YUPE
YLIE/
YDOWNE
XHIE/
XUPE
XLIE/
XDOWNE
Table 41. INT1_CFG_A description
AOI AND/OR combination of interrupt events. Default value: 0 (refer to Table 42)
6D 6-direction detection function enabled. Default value: 0 (refer to Table 42)
ZHIE/
ZUPE
Enable interrupt generation on Z high event or on direction recognition. Default
value: 0 (0: disable interrupt request, 1: enable interrupt request)
ZLIE/
ZDOWNE
Enable interrupt generation on Z low event or on direction recognition. Default
value: 0 (0: disable interrupt request, 1: enable interrupt request)