Datasheet
Register description LSM303DLHC
36/42 Doc ID 018771 Rev 1
1 LSB = 1/ODR. TLA7 through TLA0 define the time interval that starts after the first click
detection where the click detection procedure is disabled, in cases where the device is
configured for double click detection.
7.1.27 TIME WINDOW_A (3Dh)
1 LSB = 1/ODR. TW7 through TW0 define the maximum interval of time that can elapse
after the end of the latency interval in which the click detection procedure can start, in cases
where the device is configured for double click detection.
7.2 Magnetic field sensing register description
7.2.1 CRA_REG_M (00h)
Table 68. TIME_WINDOW_A register
TW7 TW6 TW5 TW4 TW3 TW2 TW1 TW0
Table 69. TIME_WINDOW_A description
TW7-TW0 CLICK-CLICK time window
Table 70. CRA_REG_M register
TEMP_EN 0
(1)
1. This bit must be set to ‘0’ for correct working of the device
0
(1)
DO2 DO1 DO0 0
(1)
0
(1)
Table 71. CRA_REG_M description
TEMP _EN
Temperature sensor enable.
0: temperature sensor disabled (default), 1: temperature sensor enabled
DO2 to DO0
Data output rate bits. These bits set the rate at which data is written to all three data
output registers (refer to Table 72). Default value: 100
Table 72. Data rate configurations
DO2 DO1 DO0 Minimum data output rate (Hz)
00 0 0.75
00 1 1.5
01 0 3.0
01 1 7.5
1 0 0 15
10 1 30