Datasheet

10
9596A–AT42–10/10
AT42QT1070
2.5 Acquisition/Low Power Mode (LP)
There are 255 different acquisition times possible. These are controlled via the LP mode byte
(see Section 5.11 on page 22) which can be written to via I
2
C-compatible communication.
LP mode controls the intervals between acquisition measurements. Longer intervals consume
lower power but have an increased response time. During calibration, touch and during the
detect integrator (DI) period, the LP mode is temporarily set to LP mode 1 for a faster response.
The QT1070 operation is based on a fixed cycle time of approximately 8 ms. The LP mode
setting indicates how many of these periods exist per measurement cycle. For example, If LP
mode = 1, there is an acquisition every cycle (8 ms). If LP mode = 3, there is an acquisition
every 3 cycles (24 ms). If a high Averaging Factor (see Section 5.9 on page 21) setting is
selected then the acquisition time may exceed 8 ms.
LP settings above mode 32 (256 ms) result in slower thermal drift compensation and should be
avoided in applications where fast thermal transients occur.
2.6 Adjacent Key Suppression (AKS) Technology
The device includes Atmel’s patented Adjacent Key Suppression (AKS) technology, to allow the
use of tightly spaced keys on a keypad with no loss of selectability by the user.
There can be up to three AKS groups, implemented so that only one key in the group may be
reported as being touched at any one time. Once a key in a particular AKS group is in detect no
other key in that group can go into detect. Only when the key in detect goes out of detection can
another key go into detect state.
The keys which are members of the AKS groups can be set (see Section 5.9 on page 21). Keys
outside the group may be in detect simultaneously.
2.7 CHANGE Line (Comms Mode Only)
The CHANGE line is active low and signals when there is a change in state in the Detection or
Input status bytes. It is cleared (allowed to float high) when the host reads the status bytes.
If the status bytes change back to their original state before the host has read the status bytes
(for example, a touch followed by a release), the CHANGE
line will be held low. In this case, a
read to any memory location will clear the CHANGE
line.
The CHANGE
line is open-drain and should be connected via a 47 k resistor to Vdd. It is
necessary for minimum power operation as it ensures that the QT1070 can sleep for as long as
possible. Communications wake up the QT1070 from sleep causing a higher power
consumption if the part is randomly polled.
Note: The CHANGE
line is pulled low 100 ms after power-up or reset.