Datasheet

HH
VS1053B OGG VORBIS ENCODER VSMPG
2.5.1 Vox and Pause Registers
X Mem Addr Name Default Description
0x1808 OffLimit 0x18 Signal limit for Vox pause
0x1809 OnLimit 0x20 Signal limit for Vox record
0x180A OffTimeLSW 0x7700 16 LSb’s of pause delay time in 1/48000 s
0x180B OffTimeMSW 0x1 16 MSb’s of pause delay time in 1/48000 s
0x180F PauseCtl 0x2 Vox control / Pause override
0 = Automatic Vox operation
1 = forbidden
2 = Pause override: Normal recording
3 = Pause override: Pause on
If the signal after the high-pass filter is below OffLimit for more than OffTime 48 kHz
samples, and if PauseCtl = 0, or if PauseCtl = 3, then pause mode is activated. Default
value of OffTime = 0x17700 = 96000 equals two seconds. Note that OffTime is always
calculated in the 48 kHz domain regardless of the samplerate of the Ogg Vorbis Encoder
Profile.
If even a single sample goes above OnLimit, and if PauseCtl = 0, or if PauseCtl = 2, then
pause mode is deactivated and normal recording continues.
OffLimit and OnLimit are linear values. Thus, doubling the value lifts the limit by 6 dB.
Having two separate values for the limits allow for hysteresis between stopping and
restarting recording. OnLimit must always be greater than or equal to OffLimit.
Example: To set OffTime, do as follows. First write 0x180A to SCI_WRAMADDR (7).
Then write 16 least significant bits of OffTime (e.g. 0x7700) to SCI_WRAM (6). Then
write the 16 most significant bits by writing (e.g. 0x1) to SCI_WRAM (6) again.
Vox and Pause registers may be written to while the Ogg Vorbis Encoder is active.
2.5.2 Vox Output to GPIO4
It is optionally possible for the user to optionally see the current status of Vox in GPIO4.
To activate this option, do the following steps before activating the Ogg Vorbis Encoder:
Write 0xC017 to SCI_WRAMADDR (7).
Read value x from SCI_WRAM (6).
Set x = x|16;
Write 0xC017 to SCI_WRAMADDR (7).
Write new value x to SCI_WRAM (6).
After this operation, whenever GPIO4 is low, normal recording is done. When GPIO4 is
high, then pause mode (either by Vox or user control) is active. So, whenever GPIO4
goes high, the main controller may read all data that is left in the buffer, and set itself to
sleep for as long until GPIO4 goes low again.
Rev. 1.70c 2012-11-16
Page 23(39)