Datasheet

ManualsBrandsAdafruit ManualsAdafruitTLC59711 Adafruit 12-Channel 16-bit PWM LED Driver SPI 5V

GND

VREG

IREF

SDTI

SCKI

VCC

OUTR0

OUTG0

OUTG3

OUTB3

SDTO

SCKO

1 mF

VCC

GND

Power

Supply

(4Vto17V)

DATA

CLK

GND

Controller

GND

VREG

IREF

SDTI

SCKI

VCC

OUTR0

OUTG0

OUTG3

OUTB3

SDTO

SCKO

1 mF

Optional

TLC59711 TLC59711

Optional

TLC59711

www.ti.com

SBVS181A –OCTOBER 2011–REVISED JULY 2012

12-Channel, 16-Bit, Enhanced Spectrum PWM, RGB, LED Driver with

3.3-V Linear Regulator and Watchdog Timer

Check for Samples: TLC59711

FEATURES

APPLICATIONS

• 12 Constant-Current Sink Output Channels

• RGB LED Cluster Lamp Displays

• Current Capability: 60 mA per channel

DESCRIPTION

• Grayscale (GS) Control with Enhanced

The TLC59711 is a 12-channel, constant-current sink

Spectrum PWM:

driver. Each output channel has individually

16-bit (65536 steps)

adjustable currents with 65536 PWM grayscale (GS)

• Global Brightness Control (BC):

steps. Also, each color group can be controlled by

7-bit (128 steps) for each color group

128 constant-current sink steps with the global

brightness control (BC) function. GS control and BC

• Power-Supply Voltage Range:

are accessible via a two-wire signal interface. The

Internal linear regulator: 4.0 V to 17 V

maximum current value for each channel is set by a

Direct power supply: 3.0 V to 5.5 V

single external resistor. All constant-current outputs

• LED Supply Voltage: Up to 17 V

are turned off when the IC is in an over-temperature

• Constant-Current Accuracy:

condition.

– Channel-to-Channel = ±1% (typ), ±3% (max)

– Device-to-Device = ±1% (typ), ±4% (max)

• Data Transfer Rate: 10 MHz (cascading)

• Linear Voltage Regulator: 3.3 V

• Auto Display Repeat Function

• Display Timing Reset Function

• Internal/External Selectable GS Clock

• Thermal Shutdown (TSD) with Auto Restart

• Unlimited Device Cascading

• Watchdog Timer for External Clock Failure

• Operating Temperature Range: –40°C to +85°C

NOTE: The number of LEDs in series changes, depending on the VCC voltage.

Typical Application Circuit Example

(Internal Linear Regulator Using V

= 4 V to 17 V)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2PowerPAD is a trademark of Texas Instruments Incoporated.

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (36 pages)

PAGE 1
TLC59711 www.ti.com SBVS181A – OCTOBER 2011 – REVISED JULY 2012 12-Channel, 16-Bit, Enhanced Spectrum PWM, RGB, LED Driver with 3.3-V Linear Regulator and Watchdog Timer Check for Samples: TLC59711 FEATURES APPLICATIONS • • • • 1 • • • • • • • • • • • • RGB LED Cluster Lamp Displays DESCRIPTION The TLC59711 is a 12-channel, constant-current sink driver. Each output channel has individually adjustable currents with 65536 PWM grayscale (GS) steps.
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TLC59711 SBVS181A – OCTOBER 2011 – REVISED JULY 2012 www.ti.com DESCRIPTION (CONTINUED) VCC Power Supply (3 V to 5.5 V) GND TLC59711 Optional VCC GND OUTR0 IREF OUTG0 ¼ VREG OUTG0 ¼ OUTR0 IREF ¼ VREG OUTG3 OUTG3 OUTB3 VCC Controller Optional VCC ¼ TLC59711 GND OUTB3 DATA SDTI SDTO SDTI SDTO CLK SCKI SCKO SCKI SCKO GND NOTE: The number of LEDs in series changes, depending on the VCC voltage. Typical Application Circuit Example (Direct Power Supplying VCC = 3 V to 5.
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TLC59711 www.ti.com SBVS181A – OCTOBER 2011 – REVISED JULY 2012 ABSOLUTE MAXIMUM RATINGS (1) (2) Over operating free-air temperature range, unless otherwise noted. VALUE MIN Supply voltage Input voltage Output voltage Output current (DC) –0.3 +18 V IREF –0.3 VREG + 0.3 V SDTI, SCKI –0.3 VREG + 0.6 V OUTR0 to OUTR3, OUTG0 to OUTG3, OUTB0 to OUTB3 –0.3 +18 V SDTO, SCKO –0.3 VREG + 0.3 V VREG –0.
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TLC59711 SBVS181A – OCTOBER 2011 – REVISED JULY 2012 www.ti.com RECOMMENDED OPERATING CONDITIONS At TA = –40°C to +85°C, and VCC = 4 V to 17 V or VCC = VREG = 3.0 V to 5.5 V, unless otherwise noted. TLC59711 MIN UNIT NOM MAX 17 V 3.3 5.5 V 17 V DC CHARACTERISTICS VCC Supply voltage, internal voltage regulator used 4 VREG Supply voltage, VREG connected to VCC 3 VO Voltage applied to output (OUTR0 to OUTR3, OUTG0 to OUTG3, OUTB0 to OUTB3) VIH High-level input voltage (SDTI, SCKI) 0.
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TLC59711 www.ti.com SBVS181A – OCTOBER 2011 – REVISED JULY 2012 ELECTRICAL CHARACTERISTICS (continued) At TA = –40°C to +85°C, VCC = 4 V to 17 V or VCC = VREG = 3 V to 5.5 V, VLED = 5 V, and CVREG = 1 µF, unless otherwise noted. Typical values are at TA = +25°C and VCC = 12 V. TLC59711 PARAMETER TEST CONDITIONS TYP MAX All OUTXn on, BCX = 7Fh, VOUTXn = VOUTfix = 1 V, RIREF = 0.
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TLC59711 SBVS181A – OCTOBER 2011 – REVISED JULY 2012 www.ti.com SWITCHING CHARACTERISTICS At TA = –40°C to +85°C, VCC = 4 V to 17 V or VCC = VREG = 3 V to 5.5 V, CVREG = 1 µF, CL = 15 pF, RL = 68 Ω, and VLED = 5 V, unless otherwise noted. Typical values are at TA = +25°C and VCC = 12 V.
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TLC59711 www.ti.com SBVS181A – OCTOBER 2011 – REVISED JULY 2012 FUNCTIONAL BLOCK DIAGRAM VCC 3.
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TLC59711 SBVS181A – OCTOBER 2011 – REVISED JULY 2012 www.ti.com PIN CONFIGURATIONS PWP PACKAGE HTSSOP-20 PowerPAD (TOP VIEW) IREF 1 20 VREG GND 2 19 VCC OUTR0 3 18 OUTB3 OUTG0 4 17 OUTG3 OUTB0 5 16 OUTR3 OUTR1 6 15 OUTB2 OUTG1 7 14 OUTG2 OUTB1 8 13 OUTR2 SDTI 9 12 SDTO SCKI 10 11 SCKO PowerPAD (Bottom Side) TERMINAL FUNCTIONS TERMINAL NAME PWP I/O DESCRIPTION IREF 1 I/O Maximum current programming terminal.
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TLC59711 www.ti.com SBVS181A – OCTOBER 2011 – REVISED JULY 2012 PARAMETRIC MEASUREMENT INFORMATION PIN EQUIVALENT INPUT/OUTPUT SCHEMATICS VREG VREG INPUT OUTPUT GND GND Figure 1. SDTI/SCKI Figure 2. SDTO/SCKO OUTXn (1) GND (1) X = R/G/B, n = 0-3. Figure 3. OUTR0 Through OUTB3 TEST CIRCUITS VCC RL VCC VREG (1) VLED OUTXn VCC IREF CVREG RIREF VREG (2) CL GND VCC SDTO/SCKO (1) CVREG GND CL (1) X = R/G/B, n = 0-3. (2) CL includes measurement probe and stray capacitance. Figure 4.
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TLC59711 SBVS181A – OCTOBER 2011 – REVISED JULY 2012 www.ti.com TIMING DIAGRAMS TWH, TWL: VREG SCKI (1) 50% GND TWH TWL TSU, TH: VREG SCKI (1) 50% GND TSU TH VREG (1) SDTI 50% GND (1) Input pulse rise and fall time is 1ns to 3ns. Figure 7. Input Timing tR0, tR1, tF0, tF1, tD0, tD1, tD2, tD3, tD4, tD5: VREG INPUT (1) 50% GND tD VOH or VOUTXnH 90% OUTPUT 50% 10% VOL or VOUTXnL tR or tF (1) Input pulse rise and fall time is 1ns to 3ns. Figure 8.
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TLC59711 www.ti.
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TLC59711 SBVS181A – OCTOBER 2011 – REVISED JULY 2012 www.ti.
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TLC59711 www.ti.com SBVS181A – OCTOBER 2011 – REVISED JULY 2012 TYPICAL CHARACTERISTICS At TA = +25°C and VCC = 24 V, unless otherwise noted. REFERENCE RESISTOR vs OUTPUT CURRENT OUTPUT CURRENT vs OUTPUT VOLTAGE 70 TA = +25°C, VCC = 12 V, BCx = 7Fh 60 24.805 Output Current (mA) RIREF, Reference Resistor (kW) 100 9.922 10 4.961 3.307 1.984 2.481 1.654 1 1.417 1.102 0.902 1.240 0.992 0.
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TLC59711 SBVS181A – OCTOBER 2011 – REVISED JULY 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C and VCC = 24 V, unless otherwise noted.
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TLC59711 www.ti.com SBVS181A – OCTOBER 2011 – REVISED JULY 2012 APPLICATION INFORMATION MAXIMUM CONSTANT SINK CURRENT SETTING The maximum constant sink current value for each channel, IOLCMax, is programmed through a single resistor, RIREF, placed between IREF and GND. The desired value can be calculated with Equation 1: RIREF (kW) = VIREF (V) IOLCMax (mA) ´ 41 Where: VIREF = the internal reference voltage on the IREF pin (1.
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TLC59711 SBVS181A – OCTOBER 2011 – REVISED JULY 2012 www.ti.com GLOBAL BRIGHTNESS CONTROL (BC) FUNCTION (SINK CURRENT CONTROL) The TLC59711 has the capability to adjust all output currents of each color group (OUTR0-3, OUTG0-3, and OUTB0-3) to the same current value. This function is called global brightness (BC) control. The BC data are seven bits long, which allows each color group output current to be adjusted in 128 steps from 0% to 100% of the maximum output current, IOLCMax.
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TLC59711 www.ti.com SBVS181A – OCTOBER 2011 – REVISED JULY 2012 GRAYSCALE (GS) FUNCTION (PWM CONTROL) The TLC59711 can adjust the brightness of each output channel using the enhanced spectrum pulse width modulation (ES-PWM) control scheme. The PWM bit length for each output is 16 bits. The use of the 16-bit length results in 65536 brightness steps from 0% to 100% brightness. The PWM operation for all color groups is controlled by a 16-bit grayscale (GS) counter.
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TLC59711 SBVS181A – OCTOBER 2011 – REVISED JULY 2012 www.ti.com ENHANCED SPECTRUM (ES) PWM CONTROL Enhanced spectrum (ES) PWM has the total display period divided into 128 display segments. The total display period refers the period between the first grayscale clock input to the 65536th grayscale clock input after BLANK (bit 213) is set to '0'. Each display period has 512 grayscale values, maximum. Each output on-time changes depending on the grayscale data.
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TLC59711 SBVS181A – OCTOBER 2011 – REVISED JULY 2012 www.ti.com REGISTER AND DATA LATCH CONFIGURATION The TLC59711 has a 224-bit shift register and a 218-bit data latch that set grayscale (GS) data, global brightness control (BC), and function control (FC) data into the device. When the internal latch pulse is generated and the data of the six MSBs in the shift register are 25h, the 218 following data bits in the shift register are copied into the 218-bit data latch.
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TLC59711 www.ti.com SBVS181A – OCTOBER 2011 – REVISED JULY 2012 From LSB-side of 224-bit shift register. 218 218-Bit Data Latch MSB 217 216 215 214 213 212-206 205-199 198-192 191 OUTTMG 1= Rising Edge EXTCLK 1= External TMGRST 1= Reset DSPRPT 1= Repeat BLANK 1= Blank BC Data Bits 6-0 for BLUE BC Data Bits 6-0 for GREEN BC Data Bits 6-0 for RED OUTB3 Bit 15 Function Control Data (5 Bits) BC Data for OUTRn/Gn/Bn (7 Bits ´ 3 = 21 Bits) 5 To function control (FC) circuit.
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TLC59711 SBVS181A – OCTOBER 2011 – REVISED JULY 2012 www.ti.com INTERNAL LATCH PULSE GENERATION TIMING The internal latch pulse is generated when the SCKI rising edge does not change for 8x the period between the last SCKI rising edge and the second to last SCKI rising edge if the data of the six MSBs in the 244-bit shift register are the command code 25h. The generation timing changes as a result of the SCKI frequency with the time range between 16384 times the internal oscillator period (2.
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TLC59711 www.ti.com SBVS181A – OCTOBER 2011 – REVISED JULY 2012 DISPLAY TIMING RESET FUNCTION This function allows the display timing to be initialized using the internal latch pulse, as shown in Figure 27. This function can be enabled or disabled by TMGRST (bit 215) in the data latch. When the TMGRST bit is '1', the GS counter is reset to '0' and all outputs are forced off when the internal latch pulse is generated.
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TLC59711 SBVS181A – OCTOBER 2011 – REVISED JULY 2012 BLANK Bit in Data Latch (Internal) EXTCLK Bit in Data Latch (Internal) www.ti.com 1 0 1 = SCKI used for OUTXn on-off timing control. 1 = OUTXn on-off state changes at the rising edge of the clock selected by the EXTCLK bit. OUTTMG Bit in Data Latch (Internal) SCKI 1 2 3 ¼ 65534 65535 65536 OFF OUTR0-R3 ON tD3 tD3 OUTXn on-off state changes at the rising edge of the clock selected by the EXTCLK bit.
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TLC59711 www.ti.com SBVS181A – OCTOBER 2011 – REVISED JULY 2012 WATCHDOG TIMER FUNCTION This function is enabled when SCKI clock is selected as GS reference clock by EXTGCK (bit 216) in the data latch. When EXTGCK bit is '1', if SCKI rising edge does not change for 8x the period between the last SCKI rising edge and the second to last SCKI rising edge with any accident, all OUTXn is forced off and GS clock counter is reset to “0” to avoid displaying unexpected image.
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TLC59711 SBVS181A – OCTOBER 2011 – REVISED JULY 2012 www.ti.com HOW TO CONTROL THE TLC59711 To set each function mode, BC color, GS output, 6-bit write command, 5-bit FC data, 21-bit BC data for each color group, and 192-bit GS data for OUTXn, a total number of 224 bits must be written into the device. Figure 31 shows the 224-bit data packet configuration.
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TLC59711 www.ti.com SBVS181A – OCTOBER 2011 – REVISED JULY 2012 Data Write and PWM Control with Internal Grayscale Clock Mode When the EXTCLK bit is '0', the internal oscillator clock is used for PWM control of OUTXn (X = R/G/B and n = 03) as the GS reference clock. This mode is ideal for illumination applications that change the display image at low frequencies. The data and clock timing is shown in Figure 9 and Figure 33. A writing procedure for the function setting and display control follows: 1.
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TLC59711 SBVS181A – OCTOBER 2011 – REVISED JULY 2012 www.ti.com Data Write and PWM Control with External Grayscale Clock Mode When the EXTCLK bit is '1', the data shift clock (SCKI) is used for PWM control of OUTXn (X = R/G/B and n = 03) as the GS reference clock. This mode is ideal for video image applications that change the display image with high frequencies or for certain display applications that must synchronize all TLC59711s. The data and clock timing are shown in Figure 9 and Figure 34.
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TLC59711 www.ti.com SBVS181A – OCTOBER 2011 – REVISED JULY 2012 There is another control procedure that is recommended for a long chain of cascaded devices. The data and clock timings are shown in Figure 9 and Figure 35. When 256 TLC59711 units are cascaded, use the following procedure: 1. Power up VCC (VLED); all OUTXn are off because BLANK is set to '1'. 2. Write the 224-bit data packet MSB-first for the 256th TLC59711 using the SDTI and SCKI signals.
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TLC59711 SBVS181A – OCTOBER 2011 – REVISED JULY 2012 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revision may differ from the page numbers in the current version. Changes from Original (October 2011) to Revision A Page • Fixed typo in last row of Table 5 ......................................................................................................................................... 21 • Changed Figure 26 .........................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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