Data Sheet
a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
ILI9341
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Page 82 of 233
7.6.8. 16-bit Parallel RGB Interface
The 16-bit RGB interface is selected by setting the DPI [2:0] bits to “101”. When RCM [1:0] are set to “10” and
DE mode is selected, the display operation is synchronized with VSYNC, HSYNC and DOTCLK signals. The
display data is transferred to the internal GRAM in synchronization with the display operation via 16-bit RGB
data bus (D [17:13] & D [11:1]) according to the data enable signal (DE). The RGB interface SYNC mode is
selected by setting the RCM [1:0] to “11”, the valid display data is inputted in pixel unit via D [17:13] and D [11:1]
according to the VFP/VBP and HFP/HBP settings. The unused D12 and D0 pins must be connected to GND for
ensure normally operation. Registers can be set by the SPI system interface.
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
D17 D16 D15 D14 D13 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1
D17 D16 D15 D14 D13 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1
Input
Data
Write Data
Register
GRAM Data &
RGB Mapping
Look-Up Table for 65k Colors mapping (16-bit to 18-bit)
7.6.9. 18-bit Parallel RGB Interface
The 18-bit RGB interface is selected by setting the DPI [2:0] bits to “110”. When RCM [1:0] are set to “10” and
DE mode is selected, the display operation is synchronized with VSYNC, HSYNC and DOTCLK signals. The
display data are transferred to the internal GRAM in synchronization with the display operation via 18-bit RGB
data bus (D [17:0]) according to the data enable signal (DE) when RCM [1:0] are set to “10”. The RGB interface
SYNC mode is selected by setting the RCM [1:0] to “11”, the valid display data is inputted in pixel unit via D [17:0]
according to the VFP/VBP and HFP/HBP settings. Registers can be set by the SPI system interface.