Data Sheet

Interrupt system STMPE610
22/56 Doc ID 15432 Rev 4
INT_STA Interrupt status register
Address: 0x0B
Type: R
Reset: 0x10
Description: The interrupt status register monitors the status of the interruption from a particular
interrupt source to the host. Regardless of whether the INT_EN bits are enabled, the
INT_STA bits are still updated. Writing '1' to this register clears the corresponding
bits. Writing '0' has no effect.
76543 2 1 0
GPIO ADC RESERVED FIFO_EMPTY FIFO_FULL FIFO_OFLOW FIFO_TH TOUCH_DET
[7] GPIO: Any enabled GPIO interrupts
[6] ADC: Any enabled ADC interrupts
[5] RESERVED
[4] FIFO_EMPTY: FIFO is empty
[3] FIFO_FULL: FIFO is full
[2] FIFO_OFLOW: FIFO is overflowed
[1] FIFO_TH: FIFO is equal or above threshold value.
This bit is set when FIFO level equals to threshold value. It will only be asserted again if FIFO
level drops to < threshold value, and increased back to threshold value.
[0] TOUCH_DET: Touch is detected