Data Sheet
a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
ILI9341
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
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7.1.8. Serial Interface
The selection of interface is done by IM [3:0] bits. Please refer to the Table in the following.
IM3
IM2
IM1
IM0
MCU-Interface Mode CSX
D/CX
SCL
Function
0 1
0 1
3-line serial interface “L”
-
Read/Write command, parameter or display data.
0 1 1 0 4-line serial interface “L”
‘H/L”
Read/Write command, parameter or display data.
1 1
0 1
3-line serial interface “L”
-
Read/Write command, parameter or display data.
1 1 1 0 4-line serial interface “L”
‘H/L”
Read/Write command, parameter or display data.
ILI9341 supplies 3-lines/ 9-bit and 4-line/8-bit bi-directional serial interfaces for communication between host
and ILI9341. The 3-line serial mode consists of the chip enable input (CSX), the serial clock input (SCL) and
serial data Input/Output (SDA or SDI/SDO). The 4-line serial mode consists of the Data/Command selection
input (D/CX), chip enable input (CSX), the serial clock input (SCL) and serial data Input/Output (SDA or
SDI/SDO) for data transmission. The data bus (D [17:0]), which are not used, must be connected to GND. Serial
clock (SCL) is used for interface with MCU only, so it can be stopped when no communication is necessary.
7.1.9. Write Cycle Sequence
The write mode of the interface means that host writes commands or data to ILI9341. The 3-lines serial data
packet contains a data/command select bit (D/CX) and a transmission byte. If the D/CX bit is “low”, the
transmission byte is interpreted as a command byte. If the D/CX bit is “high”, the transmission byte is stored as
the display data RAM (Memory write command), or command register as parameter.
Any instruction can be sent in any order to ILI9341 and the MSB is transmitted first. The serial interface is
initialized when CSX is high status. In this state, SCL clock pulse and SDA data are no effect. A falling edge on
CSX enables the serial interface and indicates the start of data transmission. See the detailed data format for
3-/4-line serial interface.
D/CX D7 D6 D5 D4 D3 D2 D1 D0
MSB LSB
Transmission byte may be Command or Data
D/CX 8-bit Transmission Byte D/CX 8-bit Transmission Byte
Data/Command select bit
Data Format for 3-line Serial Interface