Data Sheet

a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
ILI9341
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 45 of 233
7.2. RGB Interface
7.2.1. RGB Interface Selection
ILI9341 has two kinds of RGB interface and these interfaces can be selected by RCM [1:0] bits. When RCM [1:0]
bits are set to “10”, the DE mode is selected which utilizes VSYNC, HSYNC, DOTCLK, DE, D [17:0] pins; when
RCM [1:0] bits are set to “11”, the SYNC mode is selected which utilizes which utilizes VSYNC, HSYNC,
DOTCLK, D [17:0] pins. Using RGB interface must selection serial interface.
ILI9341 supports several pixel formats that can be selected by DPI [2:0] bits of “Pixel Format Set (3Ah)” and RIM
bit of RF6h command. The selection of a given interfaces is done by setting RCM [1:0] and DPI [2:0] as show in
the following table.
RCM[1:0] RIM DPI[2:0]
RGB Interface
Mode
RGB Mode Used Pins
1 0 0 1 1 0
18-bit RGB interface
(262K colors)
VSYNC, HSYNC, DE, DOTCLK,D[17:0]
1 0 0 1 0 1
16-bit RGB interface
(65K colors)
VSYNC, HSYNC, DE, DOTCLK,
D[17:13] & D[11:1]
1 0 1 1 1 0
6-bit RGB interface
(262K colors)
VSYNC, HSYNC, DE, DOTCLK, D[5:0]
1 0 1 1 0 1
6-bit RGB interface
(65K colors)
DE Mode
Valid data is determined by the DE
signal
VSYNC, HSYNC, DE, DOTCLK, D[5:0]
1 1 0 1 1 0
18-bit RGB interface
(262K colors)
VSYNC, HSYNC, DOTCLK, D[17:0]
1 1 0 1 0 1
16-bit RGB interface
(65K colors)
VSYNC, HSYNC, DOTCLK,
D[17:13] & D[11:1]
1 1 1 1 1 0
6-bit RGB interface
(262K colors)
VSYNC, HSYNC, DOTCLK, D[5:0]
1 1 1 1 0 1
6-bit RGB interface
(65K colors)
SYNC Mode
In SYNC mode, DE signal is ignored;
blanking porch is determined by B5h
command.
VSYNC, HSYNC, DOTCLK, D[5:0]
18-bit data bus interface (D[17:0] is used) , DPI[2:0] = 110, and RIM=0
D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
R[5] R[4] R[3] R[2] R[1] R[0] G[5] G[4] G[3] G[2] G[1] G[0] B[5] B[4] B[3] B[2] B[1] B[0]18bpp Frame Memory Write
D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
R[2] R[1] R[0] G[5]
G[4] G[3] G[2] G[1] G[0] B[4]
B[3] B[2] B[1] B[0]16bpp Frame Memory Write
D17 D5 D4 D3 D2 D1 D0
R[5] R[4] R[3] R[2] R[1] R[0] G[5] G[4] G[3] G[2] G[1] G[0] B[5] B[4] B[3] B[2] B[1] B[0]18bpp Frame Memory Write
16-bit data bus interface (D[17:13] & D[11:1] is used) , DPI[2:0] = 101, and RIM=0
6-bit data bus interface (D[5:0] is used) , DPI[2:0] = 110, and RIM=1
D5 D4 D3 D2 D1 D0D5 D4 D3 D2 D1 D0
D17 D5 D4 D3 D2 D1 D0
R[4] R[3] R[2] R[1] R[0] G[5] G[4] G[3] G[2] G[1] G[0]
B[4]
B[3] B[2] B[1]
B[0]
16bpp Frame Memory Write
6-bit data bus interface (D[5:0] is used) , DPI[2:0] = 101, and RIM=1
D5 D4 D3 D2 D1 D0D5 D4 D3 D2 D1 D0
R[4] R[3]
The LSB data of red/blue color depends on the EPF[1:0] setting.
The LSB data of red/blue color depends on the EPF[1:0] setting.
Pixel clock (DOTCLK) is running all the time without stopping and used to enter VSYNC, HSYNC, DE and D
[17:0] states when there is a rising edge of the DOTCLK. Vertical synchronization (VSYNC) is used to tell when