Data Sheet

a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
ILI9341
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there is received a new frame of the display. This is low enable and its state is read to the display module by a
rising edge of the DOTCLK signal.
Horizontal synchronization (HSYNC) is used to tell when there is received a new line of the frame. This is low
enable and its state is read to the display module by a rising edge of the DOTCLK signal.
In DE mode, Data Enable (DE) is used to tell when there is received RGB information that should be transferred
on the display. This is a high enable and its state is read to the display module by a rising edge of the DOTCLK
signal. D [17:0] are used to tell what is the information of the image that is transferred on the display (When
DE= ’0’ (low) and there is a rising edge of DOTCLK). D [17:0] can be ‘0’ (low) or ‘1’ (high). These lines are read
by a rising edge of the DOTCLK signal. In SYNC mode, the valid display data in inputted in pixel unit via D [17:0]
according to HFP/HBP settings of HSYNC signal and VFP/VBP setting of VSYNC. In both RGB interface modes,
the input display data is written to GRAM first then outputs corresponding source voltage according the gray
data from GRAM.
Hsync HBP HAdr HFP
VsyncVAdrVFP
(VAdr + HAdr) - Period
when valid display data are
transferred from host to
display module
(Vsync + VBP) - Verti cal interval when no valid display data is transferred from host to display
(Hsync + HBP) – Horizontal interval when no
valid di splay data is sent from host to display
VF P -- Vertical interval when no valid display
data is transferred from host to display
HFP - Horizontal interval when no valid display data is sent from host to display
VBP
Parameters Symbols Condition Min. Typ. Max. Units
Horizontal Synchronization Hsync 2 10 16 DOTCLK
Horizontal Back Porch HBP 2 20 24 DOTCLK
Horizontal Address HAdr - 240 - DOTCLK
Horizontal Front Porch HFP 2 10 16 DOTCLK
Vertical Synchronization Vsync 1 2 4 Line
Vertical Back Porch VBP 1 2 - Line
Vertical Address VAdr - 320 - Line
Vertical Front Porch VFP 3 4 - Line
Typical values are setting example when used with panel resolution 240 x 320 (QVGA), clock frequency 6.35MHz and frame