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FUJITSU SEMICONDUCTOR

DATA SHEET

2013.2

Memory FRAM

256 K (32 K × 8) Bit I

MB85RC256V

■ DESCRIPTION

The MB85RC256V is an FRAM (Ferroelectric Random Access Memory) chip in a configuration of 32,768

words × 8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the

nonvolatile memory cells.

Unlike SRAM, the MB85RC256V is able to retain data without using a data backup battery.

The read/write endurance of the nonvolatile memory cells used for the MB85RC256V has improved to be

at least 10

cycles, significantly outperforming other nonvolatile memory products in the number.

The MB85RC256V does not need a polling sequence after writing to the memory such as the case of Flash

memory or E

PROM.

■ FEATURES

• Bit configuration : 32,768 words × 8 bits

• Two-wire serial interface : Fully controllable by two ports: serial clock (SCL) and serial data (SDA).

• Operating frequency : 1 MHz (Max)

• Read/write endurance : 10

times / byte

• Data retention : 10 years ( + 85 °C), 95 years ( + 55 °C), over 200 years ( + 35 °C)

• Operating power supply voltage: 2.7 V to 5.5 V

• Low-power consumption : Operating power supply current 200 μA (Max @1 MHz)

Standby current 27 μA (Typ)

• Operation ambient temperature range

: − 40 °C to + 85 °C

• Package : 8-pin plastic SOP (FPT-8P-M02)

8-pin plastic SOP (FPT-8P-M08)

Both are RoHS compliant

DS501-00017-3v0-E

Summary of content (36 pages)

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FUJITSU SEMICONDUCTOR DATA SHEET DS501-00017-3v0-E Memory FRAM 256 K (32 K × 8) Bit I2C MB85RC256V ■ DESCRIPTION The MB85RC256V is an FRAM (Ferroelectric Random Access Memory) chip in a configuration of 32,768 words × 8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. Unlike SRAM, the MB85RC256V is able to retain data without using a data backup battery.
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MB85RC256V ■ PIN ASSIGNMENT (TOP VIEW) (TOP VIEW) A0 1 8 VDD A0 1 8 VDD A1 2 7 WP A1 2 7 WP A2 3 6 SCL A2 3 6 SCL VSS 4 5 SDA VSS 4 5 SDA (FPT-8P-M02) (FPT-8P-M08) ■ PIN FUNCTIONAL DESCRIPTIONS Pin Number 2 Pin Name Functional Description 1 to 3 A0 to A2 Device Address pins The MB85RC256V can be connected to the same data bus up to 8 devices. Device addresses are used in order to identify each of these devices. Connect these pins to VDD pin or VSS pin externally.
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MB85RC256V ■ BLOCK DIAGRAM Control Circuit SCL WP Row Decoder Serial/Parallel Converter Address Counter SDA FRAM Array 32,768 × 8 Column Decoder/Sense Amp/ Write Amp A0, A1, A2 ■ I2C (Inter-Integrated Circuit) The MB85RC256V has the two-wire serial interface; the I2C bus,and operates as a slave device. The I2C bus defines communication roles of “master” and “slave” devices, with the master side holding the authority to initiate control.
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MB85RC256V ■ I2C COMMUNICATION PROTOCOL The I2C bus is a two wire serial interface that uses a bidirectional data bus (SDA) and serial clock (SCL). A data transfer can only be initiated by the master, which will also provide the serial clock for synchronization. The SDA signal should change while SCL is the “L” level. However, as an exception, when starting and stopping communication sequence, SDA is allowed to change while SCL is the “H” level.
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MB85RC256V ■ ACKNOWLEDGE (ACK) In the I2C bus, serial data including address or memory information is sent in units of 8 bits. The acknowledge signal indicates that every 8 bits of the data is successfully sent and received. The receiver side usually outputs the “L” level every time on the 9th SCL clock after each 8 bits are successfully transmitted and received.
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MB85RC256V ■ DEVICE ADDRESS WORD (Slave address) Following the start condition, the master inputs the 8 bits device address word to start I2C communication. The device address word (8 bits) consists of a device Type code (4 bits), device address code (3 bits), and a read/write code (1 bit). • Device Type Code (4 bits) The upper 4 bits of the device address word are a device type code that identifies the device type, and are fixed at “1010” for the MB85RC256V.
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MB85RC256V ■ DATA STRUCTURE In the I2C bus, the acknowledge “L” level is output on the 9th bit by a slave, after the 8 bits of the device address word following the start condition are input by a master. After confirming the acknowledge response by the master, the master outputs 8 bits × 2 memory address to the slave. When the each memory address input ends, the slave again outputs the acknowledge “L” level.
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MB85RC256V ■ COMMAND • Byte Write If the device address word (R/W “0” input ) is sent following the start condition, the slave responds with an ACK. After this ACK, write addresses and data are sent in the same way, and the write ends by generating a stop condition at the end.
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MB85RC256V • Current Address Read When the previous write or read operation finishes successfully up to the stop condition and assumes the last accessed address is “n”, then the address at “n+1” is read by sending the following command unless turning the power off. If the memory address is last address, the address counter will roll over to 0000H. The current address in memory address buffer is undefined immediately after the power is turned on.
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MB85RC256V • Sequential Read Data can be received continuously following the Device address word (R/W “1” input) after specifying the address in the same way as for Random Read. If the read reaches the end of address, the internal read address automatically rolls over to first memory address 0000H and keeps reading. ... A Read Data 8bits A ...
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MB85RC256V ■ SOFTWARE RESET SEQUENCE OR COMMAND RETRY In case the malfunction has occurred after power on, the master side stopped the I2C communication during processing, or unexpected malfunction has occurred, execute the following (1) software recovery sequence just before each command, or (2) retry command just after failure of each command. (1) Software Reset Sequence Since the slave side may be outputting “L” level, do not force to drive “H” level, when the master side drives the SDA port.
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MB85RC256V ■ ABSOLUTE MAXIMUM RATINGS Parameter Rating Symbol Min Max Unit Power supply voltage* VDD − 0.5 +6.0 V Input voltage* VIN − 0.5 VDD + 0.5 ( ≤ 6.0) V VOUT − 0.5 VDD + 0.5 ( ≤ 6.0) V TA − 40 + 85 °C Tstg − 55 + 125 °C Output voltage* Operation ambient temperature Storage temperature *: These parameters are based on the condition that VSS is 0 V. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.
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MB85RC256V ■ ELECTRICAL CHARACTERISTICS 1.
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MB85RC256V 2.
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MB85RC256V 3. AC Timing Definitions TSU:DAT SCL VIH Start VIL SDA THD:DAT VIH VIH VIH VIH VIL VIL VIL VIL VIH VIH VIH VIH VIL VIL VIL VIL TSU:STA THD:STA TSU:STO Tr THIGH SCL Stop VIH Tf TLOW VIH VIL VIL VIH VIH VIL VIL VIH SDA Stop VIH VIL Start VIH VIL VIH VIL VIL TBUF Tr T TDH:DAT f TAA Tsp VIH SCL VIL VIL VIH SDA VIL Valid VIH VIL VIL 1/FSCL 4.
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MB85RC256V ■ POWER ON/OFF SEQUENCE tf tpd tr tpu VDD VDD 2.7 V 2.7 V VIH (Min) VIH (Min) 1.0 V 1.0 V VIL (Max) VIL (Max) 0V 0V SDA, SCL SDA, SCL > VDD × 0.8 * SDA, SCL : Don't care SDA, SCL > VDD × 0.8 * SDA, SCL * : SDA, SCL (Max) < VDD + 0.5 V Parameter Symbol SDA, SCL level hold time during power down SDA, SCL level hold time during power up Value Unit Min Max tpd 85 ⎯ ns tpu 85 ⎯ ns Power supply rising time tr 0.5 50 ms Power supply falling time tf 0.
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MB85RC256V ■ ESD AND LATCH-UP Test DUT Value ESD HBM (Human Body Model) JESD22-A114 compliant ≥ |2000 V| ESD MM (Machine Model) JESD22-A115 compliant ≥ |200 V| ESD CDM (Charged Device Model) JESD22-C101 compliant ⎯ Latch-Up (I-test) JESD78 compliant MB85RC256VPNF-G-JNE1 ⎯ Latch-Up (Vsupply overvoltage test) JESD78 compliant ⎯ Latch-Up (Current Method) Proprietary method ⎯ Latch-Up (C-V Method) Proprietary method ≥ |200 V| • Current method of Latch-Up Resistance Test Protection Resistor A
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MB85RC256V • C-V method of Latch-Up Resistance Test Protection Resistor A 1 Test 2 terminal SW + VIN V - C 200pF VDD DUT VDD (Max.Rating) VSS Reference terminal Note : Charge voltage alternately switching 1 and 2 approximately 2 sec interval. This switching process is considered as one cycle. Repeat this process 5 times. However, if the latch-up condition occurs before completing 5times, this test must be stopped immediately.
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MB85RC256V ■ REFLOW CONDITIONS AND FLOOR LIFE Item Condition Method IR (infrared reflow) , Convection Times 2 Before unpacking Please use within 2 years after production. From unpacking to 2nd reflow Within 8 days In case over period of floor life Baking with 125 °C+/-3 °C for 24hrs+2hrs/-0hrs is required. Then please use within 8 days. (Please remember baking is up to 2 times) Floor life Floor life condition Between 5 °C and 30 °C and also below 70%RH required.
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MB85RC256V ■ RESTRICTED SUBSTANCES This product complies with the regulations below (Based on current knowledge as of November 2011). • EU RoHS Directive (2002/95/EC) • China RoHS (Administration on the Control of Pollution Caused by Electronic Information Products ( )) • Vietnam RoHS (30/2011/TT-BCT) Restricted substances in each regulation are as follows.
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MB85RC256V ■ ORDERING INFORMATION Package Shipping form Minimum shipping quantity MB85RC256VPNF-G-JNE1 8-pin, plastic SOP (FPT-8P-M02) Tube 1 MB85RC256VPNF-G-JNERE1 8-pin, plastic SOP (FPT-8P-M02) Embossed Carrier tape 1500 MB85RC256VPF-G-JNE2 8-pin, plastic SOP (FPT-8P-M08) Tube 1 MB85RC256VPF-G-JNERE2 8-pin, plastic SOP (FPT-8P-M08) Embossed Carrier tape 2000 Part number DS501-00017-3v0-E 21
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MB85RC256V ■ PACKAGE DIMENSION 8-pin plastic SOP Lead pitch 1.27 mm Package width × package length 3.9 mm × 5.05 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.75 mm MAX Weight 0.06 g (FPT-8P-M02) 8-pin plastic SOP (FPT-8P-M02) +0.25 Note 1) *1 : These dimensions include resin protrusion. Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness.
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MB85RC256V (Continued) 8-pin plastic SOP Lead pitch 1.27 mm Package width × package length 5.30 mm × 5.24 mm Lead shape Gullwing Lead bend direction Normal bend Sealing method Plastic mold Mounting height 2.10 mm Max (FPT-8P-M08) 8-pin plastic SOP (FPT-8P-M08) Note 1) Pins width and pins thickness include plating thickness. Note 2) Pins width do not include tie bar cutting remainder. Note 3) # : These dimensions do not include resin protrusion. #5.24±0.10 (.206±.
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MB85RC256V ■ MARKING [MB85RC256VPNF-G-JNE1] [MB85RC256VPNF-G-JNERE1] RC256V E11150 300 [FPT-8P-M02] [MB85RC256VPF-G-JNE2] [MB85RC256VPF-G-JNERE2] RC256V E21200 300 [FPT-8P-M08] 24 DS501-00017-3v0-E
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MB85RC256V ■ PACKING INFORMATION 1. Tube 1.1 Tube Dimensions (FPT-8P-M02) • Tube/stopper shape Tube Transparent polyethylene terephthalate (treated to antistatic) Stopper (treated to antistatic) Tube length: 520 mm Tube cross-sections and Maximum quantity Maximum quantity Package form Package code FPT-8P-M02 SOP, 8, plastic (2) pcs/ tube pcs/inner box pcs/outer box 95 7600 30400 1.8 2.6 7.4 6.4 4.
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MB85RC256V 1.2 Tube Dimensions (FPT-8P-M08) • Tube/stopper shape Tube Transparent polyvinyl chloride (treated to antistatic) Stopper (treated to antistatic) Tube length: 508 mm Tube cross-sections and Maximum quantity Package form Package code FPT-08P-M08 SOP, 8 Maximum quantity pcs/tube pcs/inner box pcs/outer box 90 7200 28800 10.6 3 2.16 1.3 4.12 2.7 1.4 5.4 5.2 9.4 ©2008-2010 FUJITSU SEMICONDUCTOR LIMITED SOP209mil-PVC3:NFME-PVC-X0166-1-P-2 t = 0.
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MB85RC256V 1.3 Tube Dry pack packing specifications IC Tube Stopper For SOP Index mark Label I *1*3 Aluminum Iaminated bag Heat seal Dry pack Desiccant Humidity indicater Aluminum Iaminated bag (tubes inside) Inner box Cushioning material Inner box Label I *1*3 Cushioning material Outer box*2 Outer box Use adhesive tapes. Label II-A *3 Label II-B *3 *1: For a product of witch part number is suffixed with “E1”, a “ G bag and the inner boxes.
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MB85RC256V 1.
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MB85RC256V 1.
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MB85RC256V 2. Emboss Tape 2.1 Tape Dimensions PKG code FPT-8P-M02 Maximum storage capacity Reel No 3 pcs/reel pcs/inner box pcs/outer box 1500 1500 10500 ø1.5 +0.1 –0 8±0.1 1.75±0.1 2±0.05 4±0.1 B 0.3±0.05 A B A 5.5±0.1 12 +0.3 –0.1 5.5±0.05 ø1.5 +0.1 –0 SEC.B-B 2.1±0.1 6.4±0.1 0.4 3.9±0.2 SEC.A-A C 2012 FUJITSU SEMICONDUCTOR LIMITED SOL8-EMBOSSTAPE9 : NFME-EMB-X0084-1-P-1 (Dimensions in mm) Material : Conductive polystyrene Heat proof temperature : No heat resistance.
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MB85RC256V 2.2 IC orientation • ER type Index mark (User Direction of Feed) (User Direction of Feed) (Reel side) 2.3 Reel dimensions Reel cutout dimensions E ∗ D C B A W1 W2 r W3 ∗: Reel No Hub unit width dimensions 1 2 3 4 5 6 7 8 Tape width 8 12 16 24 Symbol A 254 ± 2 254 ± 2 330 ± 2 254 ± 2 330 ± 2 254 ± 2 330 ± 2 32 C 13 ± 0.2 D 21 ± 0.
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MB85RC256V 2.4 Taping (φ330mm Reel) Dry Pack Packing Specifications Outside diameter: φ 330mm reel Label I *1, *4 Embossed tapes Label I *1, *4 Desiccant Humidity indicator Aluminum laminated bag Dry pack Label I *1, *4 Heat seal Inner box Inner box Label I *1, *4 Taping Outer box *2, *3 Outer box Use adhesive tapes. Label II-A *4 Label II-B *4 *1: For a product of witch part number is suffixed with “E1”, a “ G bag and the inner boxes.
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MB85RC256V 2.
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MB85RC256V 2.
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MB85RC256V ■ MAJOR CHANGES IN THIS EDITION A change on a page is indicated by a vertical line drawn on the left side of that page.
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MB85RC256V FUJITSU SEMICONDUCTOR LIMITED Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome, Kohoku-ku Yokohama Kanagawa 222-0033, Japan Tel: +81-45-415-5858 http://jp.fujitsu.com/fsl/en/ For further information please contact: North and South America FUJITSU SEMICONDUCTOR AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://us.fujitsu.com/micro/ Asia Pacific FUJITSU SEMICONDUCTOR ASIA PTE. LTD.