Datasheet

TSL2591 – 10 Datasheet - Apr. 2013 - ams163.5
The device is controlled and monitored by registers accessed
through the I
2
C serial interface. These registers provide for a
variety of control functions and can be read to determine results
of the ADC conversions. The register set is summarized in Figure
TSL2591 - 16.
Figure TSL2591 – 16:
Register Description
Note: JGS-Stopped here.
Address Register Name R/W Register Function
Reset
Value
-- COMMAND W Specifies Register Address 0x00
0x00 ENABLE R/W Enables states and interrupts 0x00
0x01 CONFIG R/W ALS gain and integration time configuration 0x00
0x04 AILTL R/W ALS interrupt low threshold low byte 0x00
0x05 AILTH R/W ALS interrupt low threshold high byte 0x00
0x06 AIHTL R/W ALS interrupt high threshold low byte 0x00
0x07 AIHTH R/W ALS interrupt high threshold high byte 0x00
0x08 NPAILTL R/W No Persist ALS interrupt low threshold low byte 0x00
0x09 NPAILTH R/W No Persist ALS interrupt low threshold high byte 0x00
0x0A NPAIHTL R/W No Persist ALS interrupt high threshold low byte 0x00
0x0B NPAIHTH R/W
No Persist ALS interrupt high threshold high
byte
0x00
0x0C PERSIST R/W Interrupt persistence filter 0x00
0x11 PID R Package ID --
0x12 ID R Device ID ID
0x13 STATUS R Device status 0x00
0x14 C0DATAL R CH0 ADC low data byte 0x00
0x15 C0DATAH R CH0 ADC high data byte 0x00
0x16 C1DATAL R CH1 ADC low data byte 0x00
0x17 C1DATAH R CH1 ADC high data byte 0x00
Register Description