Datasheet

CP2102/9
Rev. 1.8 11
4. Pinout and Package Definitions
Table 9. CP2102/9 Pin Definitions
Name Pin # Type Description
V
DD
6 Power In
Power Out
3.0–3.6 V Power Supply Voltage Input.
3.3 V Voltage Regulator Output.
See "10. Voltage Regulator" on page 19.
GND 3
Ground
RST 9 D I/O
Device Reset. Open-drain output of internal POR or V
DD
monitor. An
external source can initiate a system reset by driving this pin low for
at least 15 µs.
REGIN 7 Power In
5 V Regulator Input. This pin is the input to the on-chip voltage regu-
lator.
VBUS 8 D In
VBUS Sense Input. This pin should be connected to the VBUS signal
of a USB network. A 5 V signal on this pin indicates a USB network
connection.
NC
1
/
V
PP
2
18
A Power
This pin should be left unconnected or tied to V
DD
. This pin is unused
on the CP2102 and may be connected to the Vpp programming
capacitor to maintain board compatibility with the CP2109.
V
PP
Programming Supply Voltage
D+ 4 D I/O
USB D+
D– 5 D I/O
USB D–
TXD 26 D Out
Asynchronous data output (UART Transmit)
RXD 25 D In
Asynchronous data input (UART Receive)
CTS 23
3
D In
Clear To Send control input (active low)
RTS 24
3
D Out
Ready to Send control output (active low)
DSR 27
3
D in
Data Set Ready control input (active low)
DTR 28
3
D Out
Data Terminal Ready control output (active low)
DCD 1
3
D In
Data Carrier Detect control input (active low)
RI 2
3
D In
Ring Indicator control input (active low)
SUSPEND 12
3
D Out
This pin is driven high when the CP2102/9 enters the USB suspend
state.
SUSPEND
11
3
D Out
This pin is driven low when the CP2102/9 enters the USB suspend
state.
NC 10, 13–22
These pins should be left unconnected or tied to V
DD
.
Notes:
1. For CP2102, pin is no connect (NC).
2. For CP2109, pin is V
PP
. V
PP
can be left unconnected when not used for in-application programming.
3. Pins can be left unconnected when not used.