Technical information

7-54
AIC-6915 Ethernet LAN Controller Programmer’s Manual
RxDescQueue2Ptrs
Type: R/W
Internal Registers Subgroup: Ethernet Functional Registers
Byte Address: ECh - EFh
RxDmaStatus Register
Type: R/W
Internal Registers Subgroup: Ethernet Functional Registers
Byte Address: F0h- F3h
Table 7-69. RxDescQueue2Ptrs Register
Bit(s) rw
Reset
Value Description/Function
31:27 r/w 0
Reserved:
Always write 0.
26:16 r/w 0
RxDescQ2Consumer:
Written by the AIC-6915 and read by host.
This field indicates the address of the last descriptor read by the
AIC-6915. The software driver should use the
E
ND
I
NDEX
value in
the receive completion descriptor rather that this value to determine
which buffer the AIC-6915 has used because if the AIC-6915 receives
a bad frame, it reverts the consumer back to the beginning of the
frame to reuse the buffers. Software can write this field only after
setting the
R
X
Q2C
ONSUMER
W
E
bit in the
R
X
D
ESC
Q
UEUE
2C
TRL
register.
15:11 r/w 0
Reserved:
Always write 0.
10:0 r/w 0
RxDescQ2Producer:
Written by the host driver and read by the
AIC-6915. This field indicates the index value after the last
descriptor.
Table 7-70. RxDmaStatus Register
Bit(s) rw
Reset
Value Description/Function
31:17 r 0
InternalStatus:
For diagnostic use only - may change without
notice.
16 r 0
NonBurstState:
If set, this bit indicates that the
R
X
D
MA
internal
state machine is not in a state where it can start a receive data burst.
If
R
X
D
MA
is disabled, and
N
ON
B
URST
S
TATE
is set, the AIC-6915 is
guaranteed not to start a new receive data burst until
R
X
D
MA
is
enabled. This bit should be read if the driver wishes to write to
R
X
D
MA
C
RC
without resetting the AIC-6915.
15:0 r/w 0
RxFramesLostCount:
This field indicates the number of frames
dropped due to the FIFO being full when no descriptors were
available to DMA the data into.