Technical information

7-59
Register Descriptions
PCI Diagnostic Registers
The following registers are accessible from PCI configuration, memory, and indirect I/O
space. They are used for diagnostic purposes only.
PCITargetStatus Register
Type: R/W
Internal Registers Subgroup: PCI Extra Registers
Byte Address: 0100h - 0103h
This register is for diagnostic purposes only. When the AIC-6915 responds with a
target abort, the software driver can determine the reason by reading this register.
Table 7-73. PCITargetStatus Register
Bit(s) rw
Reset
value Description/Function
31 r 0
Reserved:
Always read as 0.
30:16 r/w 0
RetryDiscardTimer:
Programmable PCI clock cycle count for retry
timeout. Default is 0 and times out after 32768 pclk’s.
15:4 r 0
Reserved:
Always read as 0.
3r/w0
IllegalOverlap:
This bit is set by hardware when the PCI target
detects a memory access to an address that is mapped to both the
Expansion ROM space and the memory space. The bit is cleared by
writing a ‘1’.
2r/w0
IllegalWrite:
This bit is set by hardware when the PCI target detects
an illegal write cycle to a read-only area, such as a write to the
configuration header registers through memory space. The bit is
cleared by writing a ‘1’.
1r/w0
IllegalBe:
This bit is set when the PCI target detects a cycle with an
illegal byte enable. This feature is not implemented in the AIC-6915.
The bit is cleared by writing a ‘1’.
0r*
PCIVoltageSense
: Voltage Sense, provides the capability to
determine which PCI bus voltage level (0 for 3.3V and 1 for 5V) the
AIC-6915 has been connected to. The state of
PCIV
OLTAGE
S
ENSE
adjusts the operation of the AIC-6915's PCI interface pin cells to
account for the difference in voltage. (*) The reset state is determined
by the external voltage present on the power pins.