Technical information

7-66
AIC-6915 Ethernet LAN Controller Programmer’s Manual
PCI CardBus Registers
The following registers are defined in the CardBus PC Card Electrical Specification. Their
implementation in the AIC-6915 is described here. For more detailed information on the
meaning of these bits see the PC Card specification.
The registers are accessible from PCI memory and indirect I/O space. They are all
synchronized to the PCI clock. They are usually not accessed during normal operation.
FunctionEvent Register
Type: R/W
Internal Registers Subgroup: PCI Functional Registers
Byte Address: 0130h - 0133h
The CardBus specification indicates that all bits, except bit 15, should be set when
the corresponding bit in the Function Present State register changes state. Since none
of those bits can change state, the bits in the Function Event register are always 0 and
are not actually implemented. Only bit 15 is implemented.
Table 7-83. FunctionEvent Register
Bit(s) rw
Reset
Value Description/Function
31:16 r 0
Reserved:
Always reads 0.
15 r/w* 0
Intr:
This bit is set if bit 15 (
I
NTR
) of the
F
ORCE
F
UNCTION
register is
set. When this bit is set, and bit 15 (Intr) of the
F
UNCTION
E
VENT
M
ASK
register is set, an interrupt is asserted. This
bit is cleared by writing a 1 to the bit. Writing a 0 has no effect.
14:5 r 0
Reserved:
Always reads 0.
4r0
GWake:
Always reads 0.
3:2 r 0
BVD[2:1]:
Always reads 0.
1r0
Ready:
Always reads 0.
0r0
WP:
Always reads 0.