Technical information

7-72
AIC-6915 Ethernet LAN Controller Programmer’s Manual
For proper operation, the internal MAC must be reset after enabling any of the
configuration bits in this register by setting bit 15 (
M
AC
S
OFT
R
ST
). For example, after
setting the
T
X
F
LOW
E
N
and
R
X
F
LOW
E
N
bits to enable flow control, set bit 15 to reset the
internal MAC. Setting bit 15 only resets the internal MAC and has no effect on any of the
bits in this register.
5r/w0
NoBackoff:
Controls the backoff algorithm after a collision. When
the bit is reset the backoff algorithm is invoked every time a
collision occurs during a transmit operation. The retransmission is
determined by a controlled randomization process called
‘truncated binary exponential backoff’. The number of slot times of
delay before the n
th
retransmission attempt is chosen as a
uniformly distributed random integer (r) in the following range:
0 <= r < 2
k
where k = min(n,10)
When
N
O
B
ACKOFF
is set, the above algorithm is disabled.
Retransmission is started after appropriate inter packet gap.
4r/w0
DelayCRC:
Delayed CRC. When the bit is set, it causes CRC
calculation to begin 4 bytes after the start of a frame delimiter
(SFD). This is different from normal operation where the
calculation begins immediately after SFD.
3r/w0
TxHalfDuplexJam:
If software sets this bit when the AIC-6915 is in
half-duplex mode, and the receive is active (Carrier Sense active),
the AIC-6915 starts transmitting to create a JAM condition.
2r/w0
PadEn:
When this bit is set and the packet is less than 60 bytes,
additional bytes are inserted in order to pad the packet to 60 bytes.
For each packet the software driver may request the AIC-6915 to
calculate and add the 4-bytes CRC to the Ethernet frame. This is
done by setting the bit
CRCEN
in the first buffer descriptor. When
the bit is cleared software is responsible for providing a minimum
frame size of 60 bytes and request the AIC-6915 to add the 4-bytes
CRC, or provide a complete minimum frame CRC.
1r/w0
FullDuplex:
When this bit is cleared (half-duplex mode), any
collision causes the transmission to be truncated and extended with
jam bytes of zeroes. When this bit is set, carrier sense and collision
functions are disabled. Data transmission and reception can
happen at the same time. In half-duplex mode, the value of IPGT
must be modified (See Table 7-92).
0r/w0
HugeFrame:
If
H
UGE
F
RAME
is not set and the transmit packet
length is over 1536 bytes, the packet is aborted. The received packet
truncates packets greater than 1536 bytes. There is no limit to
packet length if
H
UGE
F
RAME
is set.
Table 7-91. MacConfig1 Register (Continued)
Bit(s) rw
Reset
Value Description/Function