Technical information

7-75
Register Descriptions
NonBkToBkIPG Register
Type: R/W
Internal Registers Subgroup: MAC Registers
Byte Address: 500Ch- 500Fh
ColRetry Register
Type: R/W
Internal Registers Subgroup: MAC Registers
Byte Address: 5010h- 5013h
Table 7-94. NonBkToBkIPG Register
Bit(s) rw
Reset
Value Description/Function
31:15 r/w 0
Reserved:
Always reads 0.
14:8 r/w 0Ch
IPGR1:
For a non back-to-back transmit operation, a two-part
deferral algorithm is implemented. IPGR1 is part 1 and IPGR2 is
part 2. If a carrier is sensed on the network before the nibble counter
expires, the transmit engine defers and waits until the line is idle,
then restarts the IPGR1 timer.
7r/w0
Reserved:
Always reads 0.
6:0 r/w 6h
IPGR2:
If a carrier is sensed after IPGR1 and before IPGR2 expires,
the transmit engine continues to count time even though a carrier
has been sensed. When IPGR2 expires, the transmit engine transmits
the data and thus forces a collision on the network. If some stations
on the network have a smaller IPG programmed, this prevents other
stations from losing the contention all the time.
Table 7-95. ColRetry Register
Bit(s) rw
Reset
Value Description/Function
31:14 r/w 0
Reserved: Always read as 0.
13:8 r/w 37h
LateColWin:
This collision value is used to compare with the
number of bytes transmitted on the network. If a collision is
detected within this window, transmit is retried automatically.
Usually the slot time is defined as 64-bytes. However, this counter
does not include 8-byte preambles and SFD.
7:4 r/w 0
Reserved:
Always read as 0.
3:0 r/w Fh
MaxRetry:
This value specifies the number of retries allowed after a
collision before reporting the transmit operation aborted due to
excess collisions.