Technical information

8-8
AIC-6915 Ethernet LAN Controller Programmer’s Manual
Type 2 Completion Descriptor
The Type 2 descriptor is also known as the checksum completion descriptor. It consists of
two word entries. The first word is identical to the Type 0 descriptor. The second word
contains extended status information and a partial TCP/UDP checksum. To program the
AIC-6915 to use a Type 2 descriptor, the developer must set
R
X
C
OMPLETION
Q1T
YPE
in
register
R
X
C
OMPLETION
Q
UEUE
1C
TRL
to 10b.
Type 3 Completion Descriptor
The Type 3 descriptor is also known as the full completion descriptor. It consists of four
word entries. The first word is identical to the Type 0 descriptor. The second word
contains additional status information and an index pointing to the first buffer used in the
buffer queue. The third word contains a partial TCP/UDP checksum and a VLAN ID and
priority. The fourth word is a packet timestamp. To program the AIC-6915 to use a Type 3
descriptor, the developer must set
R
X
C
OMPLETION
Q1T
YPE
in register
R
X
C
OMPLETION
Q
UEUE
1C
TRL
to 11b.
Receive Buffer Descriptor Queue
There are two types of receive buffer descriptors, a 32-bit descriptor and a 64-bit
descriptor. The receive buffer descriptor type is programmed using the
R
X
64
BIT
B
UFFER
A
DDRESSES
bit in the
R
X
D
ESC
Q
UEUE
1C
TRL
register. The number of
entries in the Receive Buffer Descriptor Queue is fixed at either 256 or 2048. This number
of entries is programmed using the
R
X
D
ESC
Q1E
NTRIES
bit in the
R
X
D
ESC
Q
UEUE
1C
TRL
register.
The receive buffer descriptor contains the physical address of the buffer which contains
the actual data for the packet just received. It also contains an
E
ND
bit, which is used by
the driver to indicate the end of the buffer queue when the receive polling model is
implemented. The
E
ND
bit is not set when the receive producer-consumer model is
selected. The Receive Buffer Descriptor also contains a
V
ALID
bit, which is also used only
in the polling model. The
V
ALID
bit is set by the driver upon initialization and whenever
a receive buffer resource has been freed by the driver following processing such that it is
available again for use by the hardware.
Receive Buffer Descriptor Types
32-bit buffer descriptor
This descriptor type is used in most operating systems. The 32-bit Receive Buffer
Descriptor consists of a receive buffer address field, an
E
ND
bit, and a
V
ALID
bit. This
descriptor type is selected by setting the
R
X
64
BIT
B
UFFER
A
DDRESSES
bit to zero in register
R
X
D
ESC
Q
UEUE
1C
TRL
.
64-bit buffer descriptor
This buffer descriptor is useful when the operating system supports 64-bit addressing.
The 64-bit Receive Buffer Descriptor consists of a 64-bit receive buffer address field which
is split into the high and low addresses, an
E
ND
bit, and a
V
ALID
bit. This descriptor type
is selected by setting the
R
X
64
BIT
B
UFFER
A
DDRESSES
bit to one in register
R
X
D
ESC
Q
UEUE
1C
TRL
.