Technical information

8-17
Sample Driver
transmit completion interrupt which is enabled. The Transmit Completion Descriptors
are described in more detail below.
Transmit Completion Descriptor Types
DMA Complete Transmit Completion Descriptor
This four byte descriptor contains an identifier of 100b, which denotes a DMA complete
entry. It also includes a time stamp field, representing the 13 least significant bits of the
32-bit timer. A 1-bit priority field indicates the high or low priority queue into which the
corresponding transmit descriptor was placed. This field is useful only if two Transmit
Buffer Descriptor Queues are implemented. The last field in the descriptor is an index to
the Transmit Buffer Descriptor which contains the packet just transmitted. This index,
which is an address index, must be converted to a software index before the driver uses it
to retrieve the Transmit Buffer Descriptor. The address index is incremented by the size of
the Transmit Buffer Descriptor. Therefore, the driver must divide the address index by the
size of the Transmit Buffer Descriptor before using it as an index into software arrays. For
clarification on this concept, refer to both the code segment below, and the Receive
Architecture section of this manual.
Transmit Complete Transmit Completion Descriptor
This four byte descriptor contains an identifier of 101b, which denotes a Transmit
Complete entry. It also includes the transmit status. A 1-bit priority field indicates the
high or low priority queue into which the corresponding transmit descriptor was placed.
This field is useful only if two Transmit Buffer Descriptor Queues are implemented. The
last field in the descriptor is an index to the Transmit Buffer Descriptor which contains the
packet just transmitted. This index, which is an address index, must be converted to a
software index before the driver uses it to retrieve the Transmit Buffer Descriptor. The
address index is incremented by the size of the Transmit Buffer Descriptor. Therefore, the
driver must divide the address index by the size of the Transmit Buffer Descriptor before
using it as an index into software arrays. For clarification on this concept, refer to both the
code segment below, and the Receive Architecture section of this manual.
Transmit Buffer Descriptor Queue
Four different Transmit Buffer Descriptor types are available in the AIC-6915. The
developer should choose the type best optimized for the operating system environment.
The maximum size of the Transmit Buffer Descriptor Queue is 16 KByte. The queue is
variable size and the end is defined by the setting of the
E
ND
bit in the Buffer Descriptor.
The
E
ND
bit is set only for the first buffer in the last packet in the queue. For example,
suppose that the operating system passes a packet containing 3 buffers to the driver. If the
driver has determined that this packet will not completely fit into the descriptor queue,
this packet will be the last packet in the queue. The driver must set the
E
ND
bit for the
first Transmit Buffer Descriptor used to transmit this packet. If a Type 0 descriptor is used,
and all three buffers are placed in a single descriptor, the
E
ND
bit is set in that descriptor.
If a Type 1 descriptor is used, and the three buffers are each placed in a separate Transmit
Buffer Descriptor, the
E
ND
bit would be set in only the first descriptor. The next descriptor
following the descriptor with the
END
bit set must always be at a Transmit Producer Index
of zero.
The Transmit Buffer Descriptor contains the data to be transmitted by the AIC-6915. Since
the driver is the producer of Transmit Buffer Descriptors, it is responsible for defining the
fragment counts and addresses in the buffer. The exact format is dependent upon the type