Technical information

8-22
AIC-6915 Ethernet LAN Controller Programmer’s Manual
5
T
X
D
ESC
Q
UEUE
P
RODUCER
I
NDEX
(offset A0h): This register contains the producer
index for both the high and low priority Transmit Buffer Descriptor Queues. These
fields are incremented in software whenever the driver has prepared a packet for
transmission. The producer index is more appropriately referred to as an offset. It is
an offset to the next packet in the Transmit Buffer Descriptor Queue, in units of 8
bytes, and therefore is dependent upon the type of descriptor.
Required Fields:
HiPrTxProducerIndex = 0: The producer index should be initialized to zero,
which is the reset value.
LoPrTxProducerIndex = 0: The producer index should be initialized to zero,
which is the reset value.
6
T
X
D
ESC
Q
UEUE
C
ONSUMER
I
NDEX
(offset A4h): This register contains the consumer
index for both the high and low priority Transmit Buffer Descriptor Queues. These
fields are incremented whenever the AIC-6915 transmits a packet. The consumer
index, just as the producer index, is more appropriately referred to as an offset. It is
an offset to the next packet in the Transmit Buffer Descriptor Queue, in units of 8
bytes, and therefore is dependent upon the type of descriptor.
Required Fields:
HiPrTxConsumerIndex = 0: The consumer index should be initialized to zero,
which is the reset value.
LoPrTxConsumerIndex = 0: The consumer index should be initialized to zero,
which is the reset value.
7
T
X
F
RAME
C
TRL
(offset B0h): This register is normally not changed by the driver.
Required Fields:
TransmitThreshold: If significant transmit underruns occur, it may be necessary
to increase the value of the transmit threshold.
8
C
OMPLETION
Q
UEUE
H
IGH
A
DDR
(offset B4h): This value is used to initialize the high
32 bits of the address of all the completion queues. It is set only if 64-bit addressing
is used
.
Required Fields:
CompQueueHighAddr = 0: Set the high 32 bits of the completion queue
addresses to zero for 32-bit addressing.
9
T
X
C
OMPLETION
Q
UEUE
C
TRL
(offset B8h): This register is used to initialize the
Transmit Completion Descriptor Queue.
Required Fields:
TxCompletionSize: Either a 4 byte or an 8 bytes Transmit Completion Descriptor
is available.
TxCompletion64bitAddress = 0: This is set to zero for 32-bit environments.
TxCompletionBaseAddress: Initialize the high 24 bits of the low 32 bits of the
Transmit Completion Descriptor Queue base address.
10
C
OMPLETION
Q
UEUE
1C
ONSUMER
I
NDEX
(offset C4h): This register contains both the
Receive and Transmit Completion Descriptor Queue consumer indices.