Technical information

2-3
Receive Architecture
A programmable number of words can be skipped between buffer descriptors. This
allows the driver to store data related to a buffer. When using 64-bit addressing, all
descriptor and completion queues must be contained in the same 32-bit address space.
Descriptor queues must be aligned to a 256-byte boundary.
When using 64-bit addressing, each receive buffer must fit within one 32-bit address space
and must not cross a 4-GByte boundary.
There are two modes available for the host to inform the AIC-6915 that it has placed new
buffer on the Buffer Descriptor Queue, Normal And Polling mode.
Normal Mode
In normal mode, after adding buffers to the buffer queue, the host writes to the onchip
producer index. Some normal mode features are
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Fixed size 256- or 2048-entry queue.
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The AIC-6915 tracks the number of receive buffers available and can interrupt the
host using the RxQ1LowBuffersInt and RxQ2LowBuffersInt interrupts if the number
falls below a programmable threshold. The software driver may use this interrupt
status bit to indicate the time it should update the producer index of the receive
descriptor queue. This may save some ‘expensive’ slave cycles used for updating the
producer index.
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If the AIC-6915 runs out of descriptors, it generates a RxQ1LowBuffers or
RxQ2LowBuffers interrupt.
Polling Mode
In polling mode (RxPrefetchDescriptorMode = 1’b1), the host writes the descriptor to its
local memory. When the AIC-6915 needs a descriptor, it always reads the next one
regardless of the value in the producer pointer. If the valid bit is set, the AIC-6915 uses the
descriptor. If not, it waits for the host to place more descriptors in the queue and to write
any values to the producer. Some of the features of prefetch mode are
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Variable sized descriptor list with a maximum of 256 or 2048 entries. The host can set
an “End” bit in the last descriptor in the list, causing the AIC-6915 to automatically
wrap to the start of the list when fetching the next entry. The AIC-6915 automatically
wraps after 256 or 2048 entries even if the “End” bit is not set.
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The AIC-6915 cannot track the number of receive buffers available and only
interrupts the host requesting more buffers when it is completely out by generating a
RxQ1LowBuffersInt or RxQ2LowBuffersInt interrupt. If the host does not respond to
this interrupt fast enough, the onchip buffer may overflow and frames may be lost.
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Whenever the number of buffers is zero and the host has posted more buffers to the
receive list, it must also write to the producer pointer to inform the AIC-6915 that
more buffers have been added. The host can write any value. This causes the
AIC-6915 to refetch the descriptor and look at the Valid bit again.
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The AIC-6915 does not reset the ‘Valid’ bit in the descriptor queue. It is the software
driver’s responsibility to manage the queue. The software driver can do this by
maintaining at least one invalid descriptor right after the group of valid ones.
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In Polling mode, software driver must write to Producer Index (with RxDmaEn) to
wake-up the AIC-6915 after reset.