Technical information

6-5
AIC-6915 Internal Registers Summary
500C NonBkToBkIPG
5010 ColRetry
5014 MaxLength
5018 TxNibbleCnt
501C TxByteCnt
5020 ReTxCnt
5024 RandomNumGen
5028 MskRandomNum
502C-5033 Reserved
5034 TotalTxCnt
5040 RxByteCnt
5060 TxPauseTimer Writing to this register will cause a flow-control
frame to be transmitted with the programmed
pause time value.
5064 VLANType
5070 MiiStatus
5074-5FFF Reserved
Address Filtering
, starts @offset byte address 0x56000 in memory space
6000-60FF Perfect address memory The AIC-6915 compares the destination address
against these addresses
6100-617F Hash bitmap The AIC-6915 uses a hash of the destination
addresses to index this bitmap
Statistic
, starts @offset byte address 0x57000 in memory space
7000-7FFF Ethernet Statistic
TX Frame Processor
, starts @offset byte address 0x58000 in memory space
8000-9FFF TxGfpMem Used for loading the program for the transmit GFP.
RX Frame Processor
, starts @offset byte address 0x5A000 in memory space
A000-
BFFF
RxGfpMem Used for loading the program for the receive GFP.
Fifo Port
, starts @offset byte address 0x60000 in memory space
C000-
DFFF
EthernetFifo Used for accessing the internal FIFO. Used for
diagnostic and testing only.
Table 6-4. AIC-6915 Additional Ethernet Registers Summary (Continued)
Byte Offset
(Hex) Register Name Comments