Specifications

DK440LX SPECIFICATION UPDATE

Table 78. BIOS Beep Codes

Beeps Port 80h Code Explanation

1-2-2-3 16h BIOS ROM checksum

1-3-1-1 20h Test DRAM refresh

1-3-1-3 22h Test 8742 Keyboard Controller

1-3-3-1 28h Autosize DRAM

1-3-3-2 29h Initialize POST Memory Manager

1-3-3-3 2Ah Clear 512 KB base RAM

1-3-4-1 2Ch RAM failure on address line xxxx

1-3-4-3 2Eh RAM failure on data bits xxxx of low byte of memory bus

1-4-1-1 30h RAM failure on data bits xxxx of high byte of memory bus

2-1-2-2 45h POST device initialization

2-1-2-3 46h Check ROM copy right notice

2-2-3-1 58h Test for unexpected interrupts

2-2-4-1 5Ch Test RAM between 512 and 640 KB

1-2 98h Search for option ROMs. One long, two short beeps on

checksum failure

3. Change to Description of Manufacturing Options

In Section 1.2, Manufacturing Subsystem Options, paragraph one will be replaced in its entirety as follows:

The following are manufacturing subsystem options. Not all manufacturing options are available in all

marketing channels. Please contact your Intel representative to determine what manufacturing options are

available to you.

4. Change to Section 3.7, Desktop Management Interface

In Section 3.7, Desktop Management Interface (DMI), paragraph 2 will be replaced in its entirety as follows:

Intel can provide system manufacturers with a utility that programs system and chassis-related information

into the DMI space in Flash memory. The utility is used to program the BIOS during system manufacturing,

so that the BIOS can later report this information. Once written, this information cannot be overwritten by the

end user.