Specifications

Data

DCLK

SDR Rising

DCLK

SDR Falling

ADC12D1000RF, ADC12D1600RF

www.ti.com

SNAS519G –JULY 2011–REVISED APRIL 2013

Figure 6-4. SDR DCLK-to-Data Phase Relationship

6.3.2.2 LVDS Output Differential Voltage

The ADC12D1600/1000RF is available with a selectable higher or lower LVDS output differential voltage.

This parameter is V

and may be found in Converter Electrical Characteristics Digital Control and Output

Pin Characteristics. The desired voltage may be selected via the OVS Bit (Addr: 0h, Bit 13). For many

applications, in which the LVDS outputs are very close to an FPGA on the same board, for example, the

lower setting is sufficient for good performance; this will also reduce the possibility for EMI from the LVDS

outputs to other signals on the board. See Section 6.5 for more information.

6.3.2.3 LVDS Output Common-Mode Voltage

The ADC12D1600/1000RF is available with a selectable higher or lower LVDS output common-mode

voltage. This parameter is V

and may be found in Converter Electrical Characteristics Digital Control

and Output Pin Characteristics. See LVDS Output Common-mode Pin (VBG) for information on how to

select the desired voltage.

6.3.2.4 Output Formatting

The formatting at the digital data outputs may be either offset binary or two's complement. The default

formatting is offset binary, but two's complement may be selected via the 2SC Bit (Addr: 0h, Bit 4); see

6.3.2.5 Demux/Non-demux Mode

The ADC12D1600/1000RF may be in one of two demultiplex modes: Demux Mode or Non-Demux Mode

(also sometimes referred to as 1:1 Demux Mode). In Non-Demux Mode, the data from the input is simply

output at the sampling rate on one 12-bit bus. In Demux Mode, the data from the input is output at half the

sampling rate, on twice the number of buses. Demux/Non-Demux Mode may only be selected by the NDM

pin. In Non-DES Mode, the output data from each channel may be demultiplexed by a factor of 1:2 (1:2

Demux Non-DES Mode) or not demultiplexed (Non-Demux Non-DES Mode). In DES Mode, the output

data from both channels interleaved may be demultiplexed (1:4 Demux DES Mode) or not demultiplexed

(Non-Demux DES Mode).

See Table 6-5 for a selection of available modes.

Table 6-5. Supported Demux, Data Rate Modes

Non-Demux Mode 1:2 Demux Mode

DDR 0° Mode only 0° Mode / 90° Mode

SDR Not available Rising / Falling Mode

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