Specifications

ADC12D1800RF
www.ti.com SNAS518I –JULY 2011–REVISED JANUARY 2014
Converter Electrical Characteristics
Dynamic Converter Characteristics
(1)
(continued)
ADC12D1800RF
Units
Symbol Parameter Conditions
(Limits)
Typ Lim
DES Mode
(1)(2)(3)(4)
ENOB Effective Number of Bits A
IN
= 125 MHz @ -0.5 dBFS 9 bits
A
IN
= 248 MHz @ -0.5 dBFS 9 bits
A
IN
= 498 MHz @ -0.5 dBFS 9.1 bits
A
IN
= 1147 MHz @ -0.5 dBFS 8.6 bits
A
IN
= 1448 MHz @ -0.5 dBFS 8.6 bits
SINAD Signal-to-Noise Plus Distortion A
IN
= 125 MHz @ -0.5 dBFS 56 dB
Ratio
A
IN
= 248 MHz @ -0.5 dBFS 56 dB
A
IN
= 498 MHz @ -0.5 dBFS 56.5 dB
A
IN
= 1147 MHz @ -0.5 dBFS 53.6 dB
A
IN
= 1448 MHz @ -0.5 dBFS 53.6 dB
SNR Signal-to-Noise Ratio A
IN
= 125 MHz @ -0.5 dBFS 57.2 dB
A
IN
= 248 MHz @ -0.5 dBFS 57.3 dB
A
IN
= 498 MHz @ -0.5 dBFS 57.3 dB
A
IN
= 1147 MHz @ -0.5 dBFS 54.7 dB
A
IN
= 1448 MHz @ -0.5 dBFS 54 dB
THD Total Harmonic Distortion A
IN
= 125 MHz @ -0.5 dBFS -62.1 dB
A
IN
= 248 MHz @ -0.5 dBFS -61.6 dB
A
IN
= 498 MHz @ -0.5 dBFS -64 dB
A
IN
= 1147 MHz @ -0.5 dBFS -59.7 dB
A
IN
= 1448 MHz @ -0.5 dBFS -62.8 dB
2nd Harm Second Harmonic Distortion A
IN
= 125 MHz @ -0.5 dBFS -82 dBc
A
IN
= 248 MHz @ -0.5 dBFS -78.5 dBc
A
IN
= 498 MHz @ -0.5 dBFS -71.1 dBc
A
IN
= 1147 MHz @ -0.5 dBFS -76.9 dBc
A
IN
= 1448 MHz @ -0.5 dBFS -75.3 dBc
3rd Harm Third Harmonic Distortion A
IN
= 125 MHz @ -0.5 dBFS -64.7 dBc
A
IN
= 248 MHz @ -0.5 dBFS -62.5 dBc
A
IN
= 498 MHz @ -0.5 dBFS -71.4 dBc
A
IN
= 1147 MHz @ -0.5 dBFS -60.4 dBc
A
IN
= 1448 MHz @ -0.5 dBFS -65.8 dBc
SFDR Spurious-Free Dynamic Range A
IN
= 125 MHz @ -0.5 dBFS 64.2 dBc
A
IN
= 248 MHz @ -0.5 dBFS 62.4 dBc
A
IN
= 498 MHz @ -0.5 dBFS 68.1 dBc
A
IN
= 1147 MHz @ -0.5 dBFS 60.3 dBc
A
IN
= 1448 MHz @ -0.5 dBFS 63.6 dBc
(1) The Dynamic Specifications are ensured for room to hot ambient temperature only (25°C to 85 ° C). Refer to the plots of the dynamic
performance vs. temperature in Typical Performance Plots to see typical performance from cold to room temperature (-40°C to 25° C).
(2) These measurements were taken in Extended Control Mode (ECM) with the DES Timing Adjust feature enabled (Addr: 7h). This feature
is used to reduce the interleaving timing spur amplitude, which occurs at fs/2-fin, and thereby increase the SFDR, SINAD and ENOB.
(3) The Fs/2 spur was removed from all the dynamic performance specifications.
(4) Typical dynamic performance is only tested at Fin = 498 MHz; other input frequencies are specified by design and / or characterization
and are not tested in production.
Copyright © 2011–2014, Texas Instruments Incorporated Electrical Specifications 23
Submit Documentation Feedback
Product Folder Links: ADC12D1800RF