NuDAQ PCI-9111DG/HR Multi-Functions Data Acquisition Card User’s Guide Recycled Paper
©Copyright 1997~2003 ADLINK Technology Inc; All Rights Reserved. Manual Rev 2.50: April 4, 2003 Part No: 50-11110-102 The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer.
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Table of Contents List of Tables ..........................................................................................................v List of Figures ........................................................................................................v Outline of Chapters..............................................................................................vi Chapter 1 Introduction.........................................................................................1 1.1 Features .......
3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 A/D Range and Status Read back Register......................................... 25 Software Trigger Register....................................................................... 25 A/D Trigger Mode Control Register....................................................... 26 Interrupt Control Register........................................................................ 27 Hardware Interrupt Clear Register................................................
5.10 5.11 5.12 5.13 5.14 5.15 5.16 5.17 5.18 5.19 5.20 5.21 5.22 5.23 5.24 5.25 5.26 5.27 5.28 5.29 5.30 5.31 5.32 5.33 5.34 5.35 5.36 5.37 5.38 5.39 5.40 5.41 5.42 5.43 5.44 5.45 5.46 _9111_EDO_Read_Back........................................................................ 58 _9111_Set_EDO_Function ..................................................................... 58 _9111_DA.................................................................................................. 59 _9111_AD_Read_Data.......
Chapter 7 Software Utility................................................................................ 93 7.1 9111util.exe ............................................................................................... 93 7.1.1 Running 9111util.exe................................................................... 93 7.1.2 System Configuration................................................................... 94 7.1.3 Calibration...........................................................................
List of Tables Table 1: Table 2: Table 3: Table 4: Table 5: Table 6: I/O Address Map........................................................................... 21 Relationship between voltage and A/D data value.................. 43 Relationship between voltage and A/D converted data.......... 43 Relationship between DI and AO ............................................... 47 Data types and corresponding range........................................ 51 Functions of VRs......................................
Outline of Chapters This manual is designed to help the user to understand and configure the PCI-9111. The manual describes the programming functions and the operation theory of the PCI-9111 card. It is divided into seven chapters: Chapter 1, “Introduction”, gives an overview of the product features, applications, and specifications. Chapter 2, “Installation”, describes how to install the PCI-9111.
1 Introduction The PCI-9111 is an advanced data acquisition card based on the 32-bit PCI Bus architecture. High performance designs and the state-of-the-art technology make this card ideal for data logging and signal analysis applications in areas like medicine and process control.
1.1 Features The PCI-9111 PCI Bus Advanced Data Acquisition Card provides the following advanced features: • 32-bit PCI-Bus • 12-bit analog input resolution for PCI-9111DG 16-bit analog input resolution for PCI-9111HR • Auto-scanning channel selection up to 256 channels • Up to 100KHz A/D sampling rates • 16 single-ended analog input channels • Bipolar input signals • Programmable gain of x1, x2, x4, x8, x16 Input Range: ±10V, ±5V, ±2.5V, ±1.25V, ±0.
1.
1.3 Specifications Analog Input (A/D) • Converter: B.B. ADS7805 / ADS7804 or equivalents, successive approximation type • Resolution: 12-bit /16bits • Input Channels: 16 single-ended • Analog Signal Input Range: (Software controlled) Bipolar: ±10V, ± 5V, ±2.5V, ±1.25V, ±0.625V • Conversion Time: 8 µ sec • Over-voltage protection: Continuous ± 35V maximum • Accuracy: GAIN = 1, 2 0.01% of FSR ±1 LSB GAIN = 4, 8 GAIN = 16 0.02% of FSR ±1 LSB 0.
Digital I/O (DIO) • Numbers of Channel: 16 TTL compatible inputs and outputs • Input Voltage: P Low: Min. 0V; Max. 0.8V P High: Min. +2.0V; Max. 5.5V • Input Load: P P • Output Voltage: P P • Low: +0.8V @ -0.2mA max. High: +2.7V @ +20mA max. Low: Min. 0V; Max. 0.4V High: Min. +2.4V; Max. 5.5V Driving Capacity: P P Low: Max. +0.5V at 8.0mA (Sink) High: Min. 2.7V at 0.4mA (Source) Extended Digital I/O (EDIO) • Channel: 4 inputs and outputs • Input Voltage: P P • Input Load: P P • Low: +0.
Programmable Counter • Device: 8254 • A/D pacer: 32-bit timer (Two 16-bit counters cascaded together) with a 2MHz time base • Pacer Output: 0.
1.4 Supporting Software ADLINK provides versatile software drivers and packages for users’ different approach to building a system. ADLINK not only provides programming libraries such as DLL for most Windows based systems, but also provide ® TM drivers for other software packages such TM as LabVIEW , HP VEE , TM TM TM DASYLab , InTouch , InControl , ISaGRAF , and so on. All software options are included in the ADLINK CD. Non-free software drivers are protected with licensing codes.
® 1.4.2 PCIS-LVIEW: LabVIEW Driver ® PCIS-LVIEW contains the VIs, which is used to interface with NI’s LabVIEW software package. The PCIS-LVIEW supports Windows 95/98/NT/2000. The ® LabVIEW drivers is shipped free with the board. You can install and use them without a license. For more information about PCIS-LVIEW, please refer to the user’s guide in the CD. (\\Manual_PDF\Software\PCIS-LVIEW) 1.4.
TM 1.4.8 PCIS-ICL: InControl Driver PCIS-ICL is the InControl driver, which supports Windows NT. The PCIS-ICL is included in the ADLINK CD. A license is needed to use the drivers. 1.4.9 PCIS-OPC: OPC Server PCIS-OPC is an OPC Server, which can link with OPC clients. There are several software packages on the market, which can provide the OPC clients. The PCIS-OPC supports Windows NT and requires a licens e to operate.
2 Installation This chapter describes how to install the PCI-9111. Follow the steps carefully. • Check what you have (section 2.1) • Unpacking (section 2.2) • Check the PCB and jumper locations (section 2.3) • Setup jumpers (section 2.4) • Installing the hardware (section 2.5) • Installing the software drivers for windows (section 2.6) • Daughter Board connections (section 2.8) The PCI-9111 automatically configures the IRQ, port and BIOS addresses.
2.1 What You Have In addition to this User's Guide, the package should include the following items: PCI-9111 Enhanced Multi-function Data Acquisition Card ADLINK CD Software Installation Guide If any of these items are missing or damaged, contact the dealer from whom you purchased the product. Save the shipping materials and carton in case you want to ship or store the product in the future. 2.
2.3 PCI-9111 PCB Layout Figure 1. PCB Layout of the PCI-9111 2.4 Jumper Descriptions There is only one configurable jumper (JP1) available on the PCI-9111 card and is used to s et the range for the analog output channel. The analog output range can be uni-polar (0~10V) or bi-polar (-10V~+10V). The default setting is bi-polar. See table below for setting possibilities. BI Analog output range is -1 0 V ~ + 1 0 V Analog output range is 0 V ~ +10V JP1 UI BI JP1 UI Figure 2.
2.5 Hardware Installation Outline PCI configuration The PCI cards (or CompactPCI cards) are equipped with plug and play PCI controllers, it can request base addresses and interrupts according to PCI standards. The system BIOS will install the system resources based on the PCI cards’ configuration registers and system parameters (which are set by the system BIOS). Interrupt assignment and memory usage (I/O port locations) of the PCI cards can only be assigned by system BIOS.
2.6 Device Installation for Windows Systems Once Windows 95/98/2000 has started, the Plug and Play function of Windows system will find the new NuDAQ/NuIPC cards. If this is the first time the NuDAQ/NuIPC cards are running on your Windows system , you will be prompted to input the device information source. Please refer to the “Software Installation Guide” for step-by-step installation procedures. 2.
2.7.1 Digital Input Connector CN1 CN1 +12V GND DI 15 DI 13 DI 11 DI 9 DI 7 DI 5 DI 3 DI 1 20 18 16 14 12 10 8 6 4 2 19 17 15 13 11 9 7 5 3 1 +5V GND DI 14 DI 12 DI 10 DI 8 DI 6 DI 4 DI 2 DI 0 Figure 3. Pin Assignment of CN1 2.7.2 Digital Output Connector CN2 CN2 +12V GND DO 15 DO 13 DO 11 DO 9 DO 7 DO 5 DO 3 DO 1 20 18 16 14 12 10 8 6 4 2 19 17 15 13 11 9 7 5 3 1 +5V GND DO 14 DO 12 DO 10 DO 8 DO 6 DO 4 DO 2 DO 0 Figure 4.
2.7.3 Analog Input/Output, Extended I/O Connector CN3 CN3 N/C EDO2 EDO0 EDI3 EDI2 EDI1 EDI0 DA Out A.GND A.GND AI15 AI14 AI13 AI12 AI11 AI10 AI9 AI8 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 +5V EDO3 EDO1 ExtTrg D.GND D.GND +12V PreTrg N/C A.GND A.GND AI7 AI6 AI5 AI4 AI3 AI2 AI1 AI0 Figure 5. Pin Assignment of CN3 Legend: AI n: DA Out: ExtTrg: PreTrg: EDI n: EDO n: A.GND: D.GND: N.
2.8 Daughter Board Connection The PCI-9111 can be connected with five different daughter boards. The following are compatible: ACLD-8125, 9137, 9138, 9182, 9185, and 9188. The functionality and connections are specified in the following sections 2.8.1 Connect with ACLD-8125 The ACLD-8125 has a 37-pin D-sub connector, which can connect to the PCI-9111 through the 37-pin assemble cable. The most outstanding feature of this daughter board is the CJC (cold junction compensation) circuit on board.
2.8.4 Connect with ACLD-9185 The ACLD-9185 is a 16-channel SPDT relay output board. This board is connected to CN2 of the PCI-9111 via a 20-pin ribbon cable. By using this board, you can control external devices through the digital output signals. CN2 ACLD-9185 CN1 PCI-9111 Figure 7. Connecting ACLD-9185 to the PCI-9111 2.8.5 Connect with ACLD-9138 and ACLD-9188 The ACLD-9138 and ACLD-9188 are general-purpose terminal boards it is equipped with a 37-pin D-sub connector.
3 Registers The descriptions of the registers and structure of the PCI-9111 are outlined in this chapter. The information in this chapter will assist programmers wishing to handle the card with low-level programs. In addition, the low level programming syntax is introduced. This will help beginners learn how to operate the PCI-9111 in the shortest possible time.
3.1 PCI PnP Registers The PCI-9111 functions as a 32-bit PCI target device to any master on the PCI bus. It supports burst transfer to memory space by using 32-bit data. All data read and write is base on 32-bit data. There are three types of registers on the PCI-9111: The PCI Configuration Registers (PCR), Local Configuration Registers (LCR) and the 9111 registers. The PCR is compliant to the PCI-bus specifications. It is initialized and controlled by the plug & play (PnP) PCI BIOS.
3.2 I/O Address Map Most of the PCI-9111 registers are 16 bits. Users can access these registers using 16 bits I/O instructions. The following table shows the registers map, including descriptions and their offset addresses relative to the base address.
3.3 A/D Data Registers The PCI-9111 A/D data is stored in the FIFO after conversion. The data can be transferred to the host memory by software control only. The register format for the 12-bits PCI-9111DG and 16-bits PCI-9111HR is different and is not compatible. For the 12-bit PCI-9111 data, the 4 LSB are used to store the channel number in which the AD data is stored.
3.4 A/D Channel Control Register The PCI-9111 provides 16 single-ended analog input channels. The channel control register is used to set the A/D channels to be converted. Under non-auto scanning mode, the register sets the channel number for conversion. Under auto-scanning mode, the register sets the ending channel number.
There are 8 bits in this register. Under non-auto scan mode, the 4 LSB (CN0~CN3) stores the channel number setting with the 4 MSB (AS3~AS0) set to ‘0’. Under auto-scan mode, the 4LSB records the ending channel number. The 4 MSB are the selected channel with the value increasing automatically when an A/D trigger signal is inserted. 3.6 A/D Input Signal Range Control Register The A/D range register is used to adjust the analog input range.
3.7 A/D Range and Status Read back Register The A/D range setting and A/D FIFO status can be read back from this regis ter.
3.9 A/D Trigger Mode Control Register This register is used to control the A/D trigger source and trigger method.
Note 1: The bits in this register can only control the A/D trigger source and trigger method. The trigger conditions are independent from data transfer method and interrupt generation. Note 2: The setting of Pre-trigger and Post-trigger in bit 3 & 4 are exclusive. There is only one mode can be enabled at one ti me Note 3: TRGEVENT and POTRG bits support for hardware revision B2. It’s not available in old version. 3.
3.11 Hardware Interrupt Clear Register Becaus e the PCI interrupt signal is level triggered, the interrupt clear register must be written to in order to clear the flag after processing an interrupt request event, otherwise another interrupt request will be inserted and will cause the software to hang on processing the interrupt event. Address: BASE + 48h Attribute: write only Data Format: Bit 7 6 5 4 3 2 1 0 BASE+48h X X X X X X X X 3.
3.13 ISC2 & Trigger Event Read Back Register The interrupt control setting ISC2 and the trigger event can be retrieved from this register. Refer to section 3.9 and section 3.10 for details of each bit. Address: BASE + 0Ch Attribute: read only Data Format: Bit 7 6 5 4 3 2 1 BASE+0Ah X X X X X X TRGEVENT BASE+0Bh X X X X X X X ISC2: IRQ2 select bit, refer to section 3.10 for detail. TRGEVENT: 0 ISC2 X pre-trigger and post-trigger event.
3.14 Timer/Counter Register Each 82C54 chip occupies 4 I/O address locations on the PCI-9111 as shown below. Users may refer to the 82C54 data sheet for further descriptions of the 82C54. You can download the data sheet at the following web sites: “http://support.intel.com/support/controllers/peripheral/231164.htm ” or “http://www.tundra.
3.16 Extended I/O Ports The PCI-9111 provides four extended input signals and four extended output signals. The signals are available on the 37-pin connector. The extended output signals can be read back from the 4 MSB of the extended input port. Note that the output EDO pins on CN3 (37 pin connector) can be set to any one of the following modes by software. The definition of the set value can be found in the header file of the library ACL_PCI.H. 1. EDO_INPUT EDO mode 1 2. EDO_OUT_EDO EDO mode 2 3.
3.17 Digital I/O register There are 16 digital input and 16 digital output channels provided by the PCI-9111. The address Base+1C is used to access the digital inputs and control the digital outputs.
4 Operation Theory The operation theory of the functions on PCI-9111 card is described in this chapter. The functions include the A/D conversion, D/A conversion, Digital I/O and counter / timer. The operation theory can help users understand how to configure or to program the PCI-9111. 4.
4.1.1 A/D Conversion Procedure To use the A/D converter, users first need to know the properties of the signal being measured. Users then can decide on which channels to use on the PCI-9111. Refer to section 2.7 ‘Connectors Pin Assignment’. In addition, users need to define and control the A/D signal sources, including the A/D channel, A/D gain, and A/D signal types. Refer to section 4.1.2. For A/D signal source control.
Analog Input Signal Connection The PCI-9111 provides 16 single-ended analog input channels. The analog signal can be converted to digital value by the A/D converter. To avoid ground loops and to obtain accurate measurements of A/D value, it is quite important to understand the signal source type. The single-ended mode has only one input relative to ground and is suitable for connecting with a floating signal source. A floating source means it does not have any connection to a real ground.
Signal Range A properly define signal range is important in any data acquisition process. The input signal may be saturated if the A/D gain is too large or the resolution may be not enough if the signal is small. The maximum A/D signal range of the PCI-9111 is +/- 10 volts when the A/D gain value is 1. The A/D gain control register controls the maximum signal input range. The signal gain is programmable with 5 levels (1, 2, 4, 8, 16). The signal ranges of the 16 channels are identical at all times.
It's recommended that this mode be used if the application requires a fixed and precise A/D sampling rate. External Trigger (EITS=1, TPST=don‘t care) Through pin-16 of CN3 (ExtTrig), an A/D conversion can also be triggered by an external signal. The A/D conversion starts when ExtTrig changes from a high to a low level. The conversion rate in this mode is more flexible depending on the available trigger options of the external device.
FIFO Half-Full Polling The FIFO half-full polling mode is the most powerful AD data transfer mode. The 1 K words FIFO can store up to 10.24 ms analog data under 100 KHz sampling rate (10.024ms = 1024/100 KHz). Theoretically, the software can poll the FIFO every 10 ms without taking care how to trigger A/D or transfer A/D data. ADLINK recommend user to check your system to find out the user software‘s priority in the special application.
FIFO Half-Full Interrupt Transfer Sometimes, the applications do not need real-time processing, but the foreground program is too busy to poll the FIFO data, then the FIFO half-full interrupt transfer mode is useful. In addition, as the external A/D trigger source is used, the sampling rate may not be easy to predict, then the method could be applied because the CPU only be interrupted when the FIFO is half-full, thus reserved the CPU load.
To set up the Pre-Trigger mode, the following steps s hould be followed: 1. Set Pre-Trigger Mode Off: PTRG = OFF. 2. Set 8254 Counter #0 value N (N=1~65535). Note that the larger the counter value, the more host memory buffer is needed. 3. Set up A/D data acquire, including, A/D range, channel scan, data transfer mode and so on. 4. Set Pre-Trigger Mode On: PTRG = ON. 5. Read A/D data into host PC memory buffer by certain data transfer method, otherwise the FIFO will full.
4.1.6 Post-Trigger Control Another useful trigger mode is the Post-Trigger. Under “Post-Trigger” mode, the post-trigger (POTRG) signal (from pin-12 of CN3) is used to “START” the A/D sampling. After setting up the Post-Trigger mode, the A/D converter will not acquire data until the post-trigger signal is asserted. Users can poll the FIFO empty bit (FF_EF) to detect whether the Post-Trigger signal is asserted or not. Once the post-trigger is asserted, the hardware will begin to acquire data.
1. Disable the A/D trigger source and set the Post-trigger ON. 2. Set up A/D acquire mode. 3. Reset FIFO. 4. Enable A/D trigger source. 5. Post-trigger signal assert. 6. Disable A/D trigger source to stop acquiring data. Time POTRG Signal A/D conversion signal Figure 12. Post Trigger timing Under pre-trigger or post-trigger control schemes, the TRGEVENT flag signal (Base + 0Ch) can come in handy. When the pre-trigger or post-trigger signal is inserted, the TRGEVENT will be set to 1.
4.1.7 A/D Data Format The A/D data read from the FIFO is in two’s complement format. As the A/D gain is 1, the A/D signal range is roughly +10V ~ -10V bi-polar. In the PCI-9111HR, the whole 16 bits A/D data are available. The relationship between voltage and the A/D data value is shown in the following table: A/D Data (Hex) 7FFF 4000 0001 0000 FFFF C000 8001 8000 Decimal Value +32767 +16384 1 0 -1 -16384 -32767 -32768 Voltage (Volts) +9.99969 +5.00000 +0.00031 0.00000 -0.00031 -5.00000 -9.99969 -10.
The formula between the A/D converted data and the voltage value is: Voltage = AD_ data × 1 10 × K gain Where gain is the value of the A/D gain control register. K=32768 for PCI-9111HR, and K=2048 for PCI-9111DG. 4.2 Interrupt Control 4.2.1 System Architecture The PCI-9111‘s interrupt system is a powerful and flexible system, which is suitable for A/D data acquisition and many applications. The system is a Dual Interrupt System.
4.2.3 Dual Interrupt System The PCI controller of the PCI-9111 can receive two hardware IRQ sources. However, a PCI controller can generate only one IRQ on the PCI bus, the two IRQ sources must be distinguished by the ISR of the application software if the two IRQ are both used. The application software can use the “_9111_Get_Irq_Status” function to distinguish which interrupt is inserted.
4.3 Extended Digital I/O Port There are 4 extended digital input (EDI) signals and 4 extended digital output (EDO) signals on CN3 connector. The 4 EDI signals are dedicated used as input signal, however the 4 EDO signals can be used as digital input (Mode 1), digital output (Mode 2) or channel number output (Mode 3). For power on safety, the EDO channel is set to be input when power on initial. To modify the configuration of the usage of the signals, please use the “_9111_Set_EDO_Function” in the library.
Before performing the D/A conversion, users should take note of the D/A output range, which is set by JP1. Refer to section 2.4 for jumper setting. Analog Output Digital Data Input FFF hex Unipolar 0V ~ 10V +9.9976V Bipolar -10V ~ 10V +9.9951V 800 hex +5.0000V 0.0000V 7FF hex +4.9976V -0.0049V 000 hex 0.0000V -10.0000V 1 LSB 2.44mV 4.88mV Table 4: Relationship between DI and AO 4.5 Digital Input and Output To program the digital I/O operation is fairly straightforward.
4.6 Timer/Counter Operation 4.6.1 Introduction One 8254 programmable interval timer/counter chip is integrated on the PCI-9111. There are three counters available to the 8254 chip and 6 possible operation modes for each counter. The block diagram of the timer/counter system is shown i n diagram below.
4.6.4 I/O Address The 8254 in the PCI-9111 occupy 4 I/O address as shown below. BASE + 40 h BASE + 42 h BASE + 44 h BASE + 46 h LSB OR MSB OF COUNTER 0 LSB OR MSB OF COUNTER 1 LSB OR MSB OF COUNTER 2 CONTROL BYTE The registers BASE+0 to BASE+3 control the programming of the 8254. Users can refer to the 82C54 data sheet for more details of the 82C54. You can download the data sheet at the following web site: “http://support.intel.com/support/controllers/peripheral/231164.htm” or “http://www.tundra.
5 C/C++ Library This chapter describes the software library that operates the PCI-9111. Only the functions in DOS library and Windows 95 DLL are described. Refer to the PCIS-DASK function reference manual, which is included in ADLINK CD, for descriptions of Windows 98/NT/2000 DLL functions. The function prototypes and useful constants are defined in the header files in the LIB (DOS) and INCLUDE (Windows 95) directories. For Windows 95 DLL, the developing environment can be Visual Basic 4.
5.2 Programming Guide 5.2.1 Naming Convention The functions of the NuDAQ PCI or NuIPC CompactPCI card software drivers uses full-names to represent the functions' real meaning. The naming convention rules are: In DOS Environment: _{hardware_model}_{action_name}. e.g. _9111_Initial(). All functions in PCI-9111 driver are with 9111 as {hardware_model}. But they can be used by PCI-9111DG, PCI-9111HR.
5.3 _9111_Initial @ Description This function is used to initialize the PCI_9111. Every PCI_9111 card must be initialized by this function before other function calls are permitted.
5.5 _9111_DO_Channel @ Description This function is used to write data to the digital output ports. There are 16 digital output channels on the PCI_9111. You can control each digital output channel using this function. When performing this function, the digital output port is written to and the output status is changed to the value you had specified by do_data.
5.6 _9111_DI @ Description This function is used to read data from the digital input ports. There are 16 digital input channels on the PCI_9111. The digital input status can be accessed using this function.
5.7 _9111_DI_Channel @ Description This function is used to read data from the digital input port. There are 16 digital input channels on the PCI_9111. You can read each digital input channel using this function. While performing this function, the digital input port is read and the value of the specified channel is stored in *data.
5.8 _9111_EDI @ Description There are 4 extended digital input channels on the PCI_9111. This function is used to read data from the extended digital input ports. The retrieved data is stored in DIData and only the 4 LSB of the DIData are valid input data.
5.9 _9111_EDO @ Description There are 4 extended digital output channels on the PCI_9111. This function is used to write data to the extended digital output port. The extended digital output channels can be set with 3 different modes (refer to chapter 4); however, the output EDO value can only be place on the EDO pins when the EDO mode is set as EDO_OUT_CHN.
5.10 _9111_EDO_Read_Back @ Description This function is used to read back the output data that is written to the output port previously. @ Syntax C/C++ (DOS) U16 _9111_EDO_Read_Back (U16 cardNo, U16 *DOData ) C/C++ (Windows 95) U16 W_9111_EDO_Read_Back (U16 cardNo, U16 *DOData ) Visual Basic (Windows 95) W_9111_EDO_Read_Back (ByVal cardNo As Integer, DOData As Integer) As Integer @ Argument cardNo: DOData: The card number of PCI-9111 card initialized The read back value @ Return Code ERR_NoError 5.
5.12 _9111_DA @ Description This function is used to write data to the D/A converters. There is one Digital-to-Analog conversion channel on the PCI-9111. The resolution of each channel is 12-bit; i.e. the range is from 0 to 4095.
5.14 _9111_AD_Read_Data_Repeat @ Description This function is used to read the AD converted data n times continuously.
5.15 _9111_AD_Set_Channel @ Description This function is used to set the AD channel by means of writing data to the multiplexer scan channel register. There are 16 single-ended A/D channels on the PCI-9111; therefore the channel number can be set between 0 and 15. Under non-auto scan mode, the ADChannelNo stores the channel number setting. Under auto-scan mode, the ADChannelNo records the ending channel number.
5.16 _9111_AD_Get_Channel @ Description This function reads from the multiplexer scan channel register and obtains the AD channel number and the stores the value in ADChannelNo. Under non-auto scan mode, bits 0 to 3 of the ADChannelNo stores the channel number setting and bits 4 to 7 of the ADChannel are all ‘0”. Under auto-scan mode, bits 0 to 3 of the ADChannelNo record the ending channel number. Bits 4 to 7 of ADChannelNo are the selected channel.
5.17 _9111_AD_Set_Range @ Description This function is used to set the A/D range by means of writing data to the gain control register. The initial value of gain is '1' which is the default setting by the PCI-9111 hardware. The relationship between gain and input voltage ranges in the following table: Input Range (V) ±10 V ±5 V ±2.5 V ±1.25 V ±0.
5.18 _9111_AD_Get_Range @ Description This function is used to get the A/D range from the gain control register. The relationship between the gains and input voltage ranges are specified in the table below. Input Range (V) ±10 V ±5 V ±2.5 V ±1.25 V ±0.
5.19 _9111_AD_Get_Status @ Description This function is used to get AD FIFO status from the gain control register. @ Syntax C/C++ (DOS) U16 _9111_AD_Get_Status (U16 cardNo, U16 *ADStatus) C/C++ (Windows 95) U16 W_9111_AD_Get_Status (U16 cardNo, U16 *ADStatus) Visual Basic (Windows 95) W_9111_AD_Get_Status (ByVal cardNo As Integer, ADStatus As Integer) As Integer @ Argument cardNo: The card number of PCI-9111 card initialized ADStatus: The status of AD FIFO.
5.20 _9111_AD_Set_Mode @ Description This function is used to set AD trigger and channel scan mode. Please refer to section 5.1.3 for the detailed description of AD trigger modes and section 5.1.5 for the description of Pre-Trigger mode control.
5.21 _9111_AD_Get_Mode @ Description This function is used to get AD mode. Please refer to section 5.1.3 for the detailed description of AD trigger modes and section 5.1.5 for the description of Pre-Trigger mode control.
5.22 _9111_INT_Set_Reg @ Description This function is used to select the interrupt sources by writing data to interrupt control register. Refer to section 3.10 for details of how to setup the interrupt control register.
5.23 _9111_INT_Get_Reg @ Description This function is used to get the AD mode setting and interrupt control setting by reading data from A/D mode and interrupt control read back register. The returned settings are stored in INTC. Please refer to section 4.7 and section 4.9 for the detailed definition of each bit of the returned data.
5.24 _9111_Reset_FIFO @ Description The PCI-9111 A/D data are stored in the FIFO after conversion. This function is used to reset A/D FIFO. This function should be called before performing A/D conversion to clear the old data stored in the FIFO. @ Syntax C/C++ (DOS) U16 _9111_Reset_FIFO (U16 cardNo) C/C++ (Windows 95) U16 W_9111_Reset_FIFO (U16 cardNo) Visual Basic (Windows 95) W_9111_Reset_FIFO (ByVal cardNo As Integer) As Integer @ Argument cardNo: The card number of PCI-9111 card initialized.
5.25 _9111_AD_Soft_Trigger @ Description This function is used to trigger the A/D conversion by software. When the function is called, a trigger pulse will be generated and the converted data will be stored from address Base +0. @ Syntax C/C++ (DOS) U16 _9111_AD_Soft_Trigger (U16 cardNo) C/C++ (Windows 95) U16 W_9111_AD_Soft_Trigger (U16 cardNo) Visual Basic (Windows 95) W_9111_AD_Soft_Trigger (ByVal cardNo As Integer) As Integer @ Argument cardNo: The card number of PCI-9111 card initialized.
5.27 _9111_Get_8254 @ Description This function is used to read PCI-9111 8254 Programmable Timer. The read value are stored in count. @ Syntax C/C++ (DOS) U16 _9111_Get_8254 (U16 cardNo, U16 ChannelNo, U8 *count) C/C++ (Windows 95) U16 W_9111_Get_8254 (U16 cardNo, U16 ChannelNo, U8 *count) Visual Basic (Windows 95) W_9111_Get_8254 (ByVal cardNo As Integer, ByVal ChannelNo As Integer, count As Byte) As Integer @ Argument cardNo: Tmr_ch: count: The card number of PCI-9111 card initialized.
5.28 _9111_AD_Timer @ Description This function is used to set the Timer #1 and Timer#2. Timer#1 and Timer#2 are used as frequency dividers for generating constant A/D sampling rate dedicatedly. It is possible to stop the pacer trigger by setting any one of the dividers as 0. Because the AD conversion rate is limited due to the conversion time of the AD converter, the highest sampling rate of the PCI-9111 can not be exceeded 110 KHz. The multiplication of the dividers must be larger than 20.
5.29 _9111_Counter_Start @ Description The counter #0 of the PCI-9111 Timer/Counter chip can be freely programmed by the users. This function is used to program the counter #0. This counter is used as the pre-trigger counter.
5.30 _9111_Counter_Read @ Description This function is used to read the count value of the Counter#0. @ Syntax C/C++ (DOS) U16 _9111_Counter_Read (U16 cardNo, U16 *c0) C/C++ (Windows 95) U16 W_9111_Counter_Read (U16 cardNo, U16 *c0) Visual Basic (Windows 95) W_9111_Counter_Read (ByVal cardNo As Integer, c0 As Integer) As Integer @ Argument cardNo: The card number of PCI-9111 card initialized. c0: count value of counter#0 @ Return Code ERR_NoError 5.
5.32 _9111_INT_Source_Control @ Description The PCI-9111 has a dual interrupt system, two interrupt sources can be generated and be checked by the software. This function is used to select and control the PCI-9111’s interrupt sources by writing data to the interrupt control register. Refer to section 5.2 for details of the interrupt system.
5.33 _9111_CLR_IRQ @ Description This function is used to clear interrupt request which is requested by PCI-9111. If you use EOC interrupt or FIFO half full interrupt to transfer A/D converted data, you should use this function to clear interrupt request status; otherwise, the new coming interrupt will not be generated.
5.35 _9111_Get_IRQ_Status @ Description This function is used to get the status of the two IRQs (INT1 and INT2) in PCI-9111 card. @ Syntax C/C++ (DOS) void _9111_Get_IRQ_Status (U16 cardNo, U16 *ch1, U16 *ch2) C/C++ (Windows 95) void W_9111_Get_IRQ_Status (U16 cardNo, U16 *ch1, U16 *ch2) Visual Basic (Windows 95) W_9111_Get_IRQ_Status (ByVal cardNo As Integer, ch1 As Integer, ch2 As Integer) @ Argument cardNo: the card number of PCI-9111 card initialized.
5.36 _9111_AD_FFHF_Polling @ Description This function is used to perform powerful AD data transfer by applying half-full polling mode. This method checks the FIFO half full signal every time call this function. If the FIFO is not half-full, the software do not read data. When the FIFO is full, the AD FIFO is overrun. When the FIFO is half-full but not full, software reads the A/D data, stored in FIFO, in size of one “block” (512 words).
5.37 _9111_AD_Aquire @ Description This function is used to trigger the A/D conversion data for PCI-9111 by software trigger. It reads the 12 bits A/D data when the data is ready. @ Syntax C/C++ (DOS) U16 _9111_AD_Aquire (U16 cardNo, I16 far *ad_data) C/C++ (Windows 95) U16 W_9111_AD_Aquire (U16 cardNo, I16 *ad_data) Visual Basic (Windows 95) W_9111_AD_Aquire (ByVal cardNo As Integer, ad_data As Integer) As Integer @ Argument cardNo: ad_data: the card number of PCI-9111 card initialized.
5.38 _9111_AD_HR_Aquire @ Description This function is used to trigger the A/D conversion data for PCI-9111HR by software trigger. It reads the 16 bits A/D data when the data is ready. @ Syntax C/C++ (DOS) U16 _9111_AD_HR_Aquire (U16 cardNo, I16 far *ad_data) C/C++ (Windows 95) U16 W_9111_AD_HR_Aquire (U16 cardNo, I16 *ad_data) Visual Basic (Windows 95) W_9111_AD_HR_Aquire (ByVal cardNo As Integer, ad_data As Integer) As Integer @ Argument cardNo: ad_data: the card number of PCI-9111 card initialized.
5.39 _9111_AD_INT_Start @ Description This function is used to initialize and start up the AD EOC (end-of-conversion) interrupt transfer mode. This function could perform A/D conversion N times with interrupt data transfer by using pacer trigger. It takes place in the background which will not stop until the N-th conversion has been completed or your program execute _9111_AD_INT_Stop() function to stop the process.
If the auto_scan is set as enable, the selection sequence of A/D channel is: 0, 1, 2, 3, ... , [ad_ch_no], 0, 1, 2, 3, ... , [ad_ch_no], ... . If the auto_scan is set as disable, only the data input from [ad_ch_no] is converted.
W_9111_AD_FFHF_INT_Start (ByVal cardNo As Integer, ByVal auto_scan As Integer, ByVal ad_ch_no As Integer, ByVal ad_gain As Integer, ByVal blockNo As Integer, ad_buffer As Integer, ByVal c1 As Integer, ByVal c2 As Integer) As Integer @ Argument cardNo: the card number of PCI-9111 card initialized. auto_scan: 0: autoscan is disabled. 1: autoscan is enabled. ad_ch_no: A/D channel number. If the auto_scan is set as enable, the selection sequence of A/D channel is: 0, 1, 2, 3, ... , [ad_ch_no], 0, 1, 2, 3, ...
5.41 _9111_AD_INT_Status @ Description This function is used to check the status of interrupt operation. The _9111_AD_INT_Start() is executed on background, therefore you can issue this function to check the status of interrupt operation. While all the specified counts of data are acquired, the interrupt status will be changed to “AD_INT_STOP”.
5.42 _9111_AD_FFHF_INT_Status @ Description This function is used to check the status of interrupt operation using AD FIFO Half Full Interrupt Transfer Mode. The _9111_AD_FFHF_INT_Start is executed on background, therefore you can issue this function to check the status of interrupt operation. While all the specified blocks of data are acquired, the interrupt status will be changed to “AD_FFHF_BLOCK_FULL”.
5.43 _9111_AD_FFHF_INT_Restart @ Description After calling _9111_AD_FFHF_INT_Start, the AD conversion and transfer won’t stop until the N blocks of conversion have been completed. After the N blocks of AD data are acquired, calling this function can restart the FIFO half full interrupt transfer without re-initial all the relative registers. However, if _9111_AD_INT_Stop has been called, the program should use _9111_AD_FFHF_INT_Start to restart interrupt transfer function.
5.44 _9111_AD_INT_Stop @ Description This function is used to stop both the interrupt data transfer functions. After executing this function, the internal AD trigger is disabled and the AD timer is stopped. This function returns the number/block of data has been transferred, no matter whether the AD interrupt data transfer is stopped by this function.
5.45 _9111_AD_Get_TrigEvent @ Description This function is used to get the trigger event status. Note that this function supports only hardware version B2. @ Syntax C/C++ (DOS) U16 _9111_AD_Get_TrigEvent(U16 cardNo, U16 *TRGEVENT) C/C++ (Windows 95) U16 W_9111_AD_Get_TrigEvent (U16 cardNo, U16 *TRGEVENT) Visual Basic (Windows 95) W_9111_AD_Get_TrigEvent (ByVal cardNo As Integer, TRGEVENT As Integer) As Integer @ Argument: CardNo: the card number of PCI-9111 card initialized. TRGEVENT: the trigger event.
6 Calibration In data acquisition processes, how to calibrate your measurement devices to maintain its accuracy is very important. Users can calibrate the analog input and output channels under the users' operating environment to maximize the accuracy. This chapter will guide you though how to calibrate the PCI-9111. 6.
6.2 VR Assignment There are five variable resistors (VR) on the PCI-9111 board to allow you making accurate adjustment of the A/D and D/A channels. The function of each VR is specified in Table 6 below. VR1 VR2 VR3 VR4 VR5 D/A full scale adjustment D/A offset adjustment A/D offset adjustment A/D full scale adjustment A/D programmable amplifier offset adjustment Table 6: Functions of VRs 6.3 A/D Adjustment 1. Set the analog gain = 1 and channel number #0 using the software package. 2.
6.4 D/A Adjustment 6.4.1 Unipolar Analog Output 1. Set JP1 to select uni-polar. Connect the DVM (+) to CN3 pin-30 (DAOut) and DVM (-) to A.GND. 2. Write the digital value 0 to the DAC. Trim VR2 to obtain a 0V reading on the DVM 3. Write the digital value 4095 to the DAC. Trim VR1 to obtain a 10V reading on the DVM. 6.4.2 Bipolar Analog Output 1. Set JP1 to select bipolar. Connect the DVM (+) to CN3 pin-30 (DAOut) and DVM (-) to A.GND. 2. Write the digital value 2048 to the DAC.
7 Software Utility The software CD provides two utility programs, the 9111util.exe and I_eeprom. The 9111util.exe provides three functions. It is used for system configuration, calibration, and Functional Testing. The I_eeprom utility is used to enable or disable interrupt of PCI-9111 board. Both utility programs are described in this chapter. 7.1 9111util.exe There are 3 functions provided by the 9111util.exe. It used for system configuration, calibration, and functional testing.
****** PCI-9111 Utility Rev. 1.0 ****** Copyright © 1995-1996, ADLINK Technology Inc. All rights reserved. : Configuration. : Calibration. : Function testing. : Quit. >>> Select function key F1 ~ F3, or press to quit. <<< Figure 17. Main screen menu of 9111util.exe 7.1.2 System Configuration This function guides you to configure the PCI-9111 card, and set the right hardware configuration.
7.1.3 Calibration This function is used to guide you though on how to calibrate the PCI-9111. The calibration program serves as a useful test for the PCI-9111's A/D and D/A functions and can aid in troubleshooting if problems arise. Note: For an environment with frequently large changes in temperature and vibration, a 3 months re-calibration interval is recommended. For laboratory conditions, 6 months to 1 year is acceptable.
If option 3 is selected, the following figure will be displayed: If completed Step5 then press to next step, to abort. Figure 20. PCI-9111 layout during calibration 7.1.4 Functional Testing This function is used to test the functions of the PCI-9111; it includes tests for the Digital I/O, D/A, A/D polling, A/D Interrupt, and A/D FIFO Half-Full Interrupt. When you choose one of the testing functions from the functions menu, a diagram is displayed on the screen.
Figure 22. A/D with Polling Test Window 7.2 I_EEPROM This file is used to enable or disable the interrupt of the PCI-9111 board. This software is a text-driven program. By default, the interrupt on the PCI-9111 board is “on”; users wishing not to use the interrupt function can use this utility to turn off the interrupt of the PCI-9111 board.
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4. Customers are responsible for the fees regarding transportation of damaged products to our company or to the sales office. 5. To ensure the speed and quality of product repair, please download an RMA application form from our company website www.adlinktech.com . Damaged products with RMA forms attached receive priority. For further questions, please contact our FAE staff. ADLINK: service@adlinktech.com Test & Measurement Product Segment: NuDAQ@adlinktech.
