NuDAQ ACL-8112 Series Enhanced Multi-Functions Data Acquisition Cards User’s Guide
©Copyright 1996~2000 ADLINK Technology Inc. All Rights Reserved. Manual Rev. 3.52: Jan 2, 2003 Part No.: 50-11012-200 The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer.
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Table of Contents Chapter 1 Introduction................................................................. 1 1.1 1.2 1.3 1.4 Features .......................................................................................................... 3 Applications .................................................................................................... 4 Specifications ................................................................................................. 4 Software Support......................
Chapter 4 Registers................................................................... 31 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 I/O Port Address..........................................................................................32 A/D Data Registers .....................................................................................33 A/D Channel Multiplexer Register.............................................................33 A/D Range Control Register..........................................
Chapter 7 C Language Library................................................... 53 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 7.10 7.11 7.12 7.13 7.14 7.15 7.16 7.17 7.18 7.19 7.20 7.21 7.22 7.23 _8112_Initial.................................................................................................54 _8112_Switch_Card_No............................................................................56 _8112_DI......................................................................................................
How to Use This Guide This manual is designed to help you use the ACL-8112. The manual describes how to modify various settings on the ACL-8112 card to meet your requirements. It is divided into seven chapters: Chapter 1, “Introduction,” gives an overview of the product features, applications, and specifications. Chapter 2, “Installation," describes how to install the ACL-8112.
1 Introduction The ACL-8112 is a high performance, high speed multi-function data acquisition card for IBM PC or compatible computers. The ACL-8112 series is designed to combine all data acquisition functions, such as A/D, D/A, DIO and timer/counter into a single board, The high-end specifications of the card makes it ideal for a wide range of applications requiring high speed. Figure 1.1 shows the block diagram of the ACL-8112.
2 • Introduction ANALOG INPUT REF 0 IN CH 15 > > CH 1 CH 2 . . . > < < CH 0 REF 1 IN D/A 1 OUT GND GND D/A 0 OUT MUX SCAN CONTROL 16 channel Single-ended or 8 Differential Analog Multiplexer +5V GAIN SELECT DC/DC CONVERTER -15 AMP +15 12-Bit Code Latch 12-Bit Code Latch DMA SELECT #1 OR #3 PC/AT BUS DATA BUFFER DACK DRQ EXT.
1.1 Features The ACL-8112 series Enhanced Multi-function Data Acquisition Card provides the following advanced features: • AT-Bus • 16 single-ended or 8 differential analog input channels for ACL8112DG/HG, 16 single-ended for ACL-8112PG • Bipolar or unipolar input signals for ACL-8112DG/HG, bipolar for ACL8112PG • Programmable gain • High gain for ACL-8112HG:( x0.5, x1, x5, x10, x50, x100, x500, x1,000) • Normal gain for ACL-8112DG (x0.
1.2 Applications • Industrial and laboratory ON/OFF control • Energy management • Annunciation • 16 TTL/DTL compatible digital input channels • Security controller • Product test • Period and pulse width measurement • Event and frequency counting • Waveform and pulse generation • BCD interface driver 1.
• ACL-8112PG: Bipolar : ± 10V ,± 5V, ± 2.5V, ± 1.25V, ± 0.625V Or Bipolar : ± 5V, ± 2.5V, ± 1.25V, ± 0.625V, ± 0.3125V • Conversion Time: 8 µ sec • Overvoltage protection: Continuous ± 35V maximum • Accuracy: (ACL-8112HG) GAIN = 0.5, 1 GAIN = 5, 10 GAIN = 50, 100 GAIN = 500, 1000 0.01% of FSR ± 1 LSB 0.02% of FSR ± 1 LSB 0.04% of FSR ± 1 LSB 0.04% of FSR ± 1 LSB (ACL-8112DG) GAIN = 0.5, 1 GAIN = 2, 4 GAIN = 8 0.01% of FSR ± 1 LSB 0.02% of FSR ± 1 LSB 0.04% of FSR ± 1 LSB (ACL-8112PG) GAIN = 0.
• Output Range: Internal reference: (unipolar) 0~5V or 0~10V External reference: (unipolar) max. +10V or -10V • Settling Time: 30 µ sec • Linearity: ± 1/2 bit LSB • Output driving capability: ± 5mA max. ♦ Digital I/O (DIO) • Number of channels: 16 TTL compatible inputs and outputs • Input Voltage: Low: Min. 0V ; Max. 0.8V High: Min. +2.0V • Input Load: Low: +0.5V @ -0.2mA max. High: +2.7V @+20mA max. • Output Voltage: Low: Min. 0V ; Max. 0.4V High: Min. +2.4V • Driving Capacity: Low: Max.
♦ General Specifications • I/O Base Address: 16 consecutive address location • Interrupt IRQ: IRQ3,5,6,7,9,10,11,12,15 (9 levels) • DMA Channel: CH1 and CH3 (Jumper selectable) • Connector: 37-pin D-type connector • Operating Temperature: 0 °C ~ 55 °C • Storage Temperature: -20 °C ~ 80°C • Humidity: 5 ~ 95%, non-condensing • Power Consumption: ACL-8112DG/HG: +5 V @ 430 mA typical +12V @ 150 mA typical ACL-8112PG: +5 V @ 450 mA typical 12 V @ 150 mA typical • Dimension: ACL-8112DG/HG: 162mm(
1.4 Software Support 1.4.1 Programming Library For users who are writing their own programs, we provide MS-DOS Borland C/C++ programming library. ACLS-DLL2 is the Development Kit for NuDAQ ISA-Bus Cards with Analog I/O for windows 3.1/95(98)/NT. ACLS-DLL2 can be used in many programming environments, such as VC++, VB, and Delphi. ACLS-DLL2 is included in the ADLINK CD. To use this package a license is required. 1.4.
2 Installation This chapter describes how to install the ACL-8112 series products. Please use the following steps to install the product. • Check what you have (section 2.1) • Unpacking (section 2.2) • Check the PCB and jumper location(section 2.3) • Install the hardware and setup the jumpers and switches (section 2.4~2.12) • Cabling with external devices (section 2.13) 2.
2.2 Unpacking The card contains electro-static sensitive components that can be easily be damaged by static electricity. Therefore, the card should be handled on a grounded anti-static mat. The operator should be wearing an anti-static wristband, grounded at the same point as the anti-static mat. Inspect the card module carton for obvious damages. Shipping and handling may cause damage to your module. Be sure there are no shipping and handling damages on the modules carton before continuing.
. . . . . . . . JP5 JP4 SW1 EXTTRG INTTRG 3 5 6 7910111215NC CN2 CN1 8112 Ver C. JP8 8254 1 3 X DRQ 1 3 X DACK EXTCLK JP7 JP6 INTCLK ADS774 VR1 VR2 VR3 VR4 VR5 VR6 CN3 JP3 INT DIFF SING EXT1 EXT2 JP2 -5V - 10V JP1 2.3 ACL-8112's Layout . . . . . . . . Figure 2.1-1 PCB Layout of the ACL-8112DG/HG Ver C.
. 12 • Installation . . . . . . . . . . . . JP3 INTTRG SW1 JP5 EXTTRG 3 5 6 7 910111215X CN2 CN1 8112PG Ver. B1 . . . Figure 2.
2.4 Jumper and DIP Switch Description You can change the ACL8112's channels and the base address by setting jumpers and DIP switches on the card. The card's jumpers and switches are preset at the factory. You can change the jumper settings for your own applications. A jumper switch is closed (sometimes referred to as "shorted") with the plastic cap inserted over two pins of the jumper. A jumper is open when the plastic cap is inserted over one or no pin(s) of the jumper. 2.
I/O port Address(Hex) 200-20F 210-21F 220-22F (default) 230-23F : 300-30F : 3F0-3FF A9 -(1) -(1) -(1) -(1) 1 A8 ON (0) ON (0) ON (0) ON (0) 2 A7 ON (0) ON (0) ON (0) ON (0) 3 A6 ON (0) ON (0) ON (0) ON (0) 4 A5 ON (0) ON (0) OFF (1) OFF (1) 5 A4 ON (0) OFF (1) ON (0) OFF (1) -(1) OFF (1) ON (0) ON (0) ON (0) ON (0) -(1) OFF (1) OFF (1) OFF (1) OFF (1) OFF (1) Table 2.2 Possible Base Address Combinations A0, ..., A9 corresponds to the PC Bus address lines A9 is fixed at “1”.
2.6 Analog Input Channel Configuration (This section is for ACL-8112DG and ACL-8112HG only.) The ACL-8112 offers 16 single-ended or 8 differential analog input channels. JP3 controls the analog input channel configuration. The setting of JP3 is specified in the following illustration. SING Single-ended (default setting) JP3 DIFF SING Differential Input JP3 DIFF Figure 2.
2.7 DMA Channel Setting The A/D data transfer of the ACL-8112 is designed with DMA transfer capabilities. The setting of the DMA for channel 1 or channel 3 is controlled by JP7 and JP8 on the ACL-8112DG/HG, and JP1 and JP2 on the ACL8112PG . Possible settings are shown below: Note: On floppy disk only machine, we suggest you set the DMA to level 3. If you have a hard disk installed in the computer, level 1 is preferable. NO DMA DRQ JP8/JP2 1 3 X DACK JP7/JP1 1 3 X DMA 1 (Default) DMA 3 Figure 2.
2.8 Internal/External Trigger Setting The A/D conversion trigger source of the ACL-8112 can come from an internal or external source. The internal or external trigger source is set by JP4 on the ACL-8112DG/HG and by JP5 on the ACL-8112PG, as shown on Figure 2.5. Note that there are two internal trigger sources, one is by software trigger and the other is by the programmable pacer trigger, which is controlled by the mode control register(see section 4.5).
2.9 Clock Source Setting The 8254 programmable interval timer is used in the ACL-8112. It provides 3 independent 16-bit programmable down counters. The input of counter 2 is connected to a precision 2MHz oscillator which is the internal pacer. The input of counter 1 is cascaded from the output of counter 2. Channel 0 is free for user's applications. There are two selections for the clock source of channel 0: the internal 2MHz clock or an external clock signal from connector CN3 pin 37.
2.11 D/A Reference Voltage Setting The D/A converter's reference voltage source can be internally or externally generated. The external reference voltage is connected via CN3 pin 31(ExtRef1) and pin 12(ExtRef2), see section 3.1. The D/A reference source of channel 1 and channel 2 are selected using JP2 for the ACL-8112DG/HG and JP6 and JP7 for the ACL-8112PG respectively.
The internal voltage can be set to -5V or -10V which is selected by JP1 for the ACL-8112DG/HG and JP8 for the ACL-8112PG. Possible configurations are specified in Figure 2.9. Note that the internal reference voltage is used only when JP2 of the ACL-8112DG/HG or JP6 and JP7 of the ACL-8112PG is set to internal reference. -10V Reference Voltage is -5V (default setting) JP1 / JP8 -5V -10V Reference Voltage is -10V JP1 / JP8 -5V Figure 2.9 Internal Reference Voltage Setting 2.
3 Signal Connections This chapter describes the connectors of the ACL-8112. Signal connections between the ACL-8112 and external devices, such as daughter boards or other devices are also outlined.
3.1 Connectors Pin Assignment The ACL-8112 comes equipped with two 20-pin insulation displacement connectors - CN1 and CN2 and one 37-pin D-type connector - CN3. CN1 and CN2 are located on the board and CN3 is located at the rear plate. CN1 is used for digital output signals, CN2 is used for digital input signals and CN3 is used for analog input, analog output and timer/counter's signals. The pin assignment for each connector is illustrated in Figure 3.1 ~ Figure 3.3.
• CN3: Analog Input/Output & Counter/Timer ( for single-ended connection: ACL-8112DG/HG/PG) CN3 AI0 AI1 AI2 AI3 AI4 AI5 AI6 AI7 A.GND A.GND V.REF ExtRef2 +12V A.GND D.GND COUT0 ExtTrg N/C +5V 1 2 3 4 5 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 6 7 8 9 10 11 12 13 14 15 16 17 18 19 AI8 AI9 AI10 AI11 AI12 AI13 AI14 AI15 A.GND A.GND AO1 ExtRef1 AO2 GATE0 GATE N/C N/C ExtCLK Figure 3.3a.
Legend: AIn: Analog Input Channel n ( single-ended) AIHn: Analog High Input Channel n ( differential) AILn: Analog Low Input Channel n ( differential) ExtRef n: External Reference Voltage for D/A CH n AOn: Analog Output Channel n ExtCLK: External Clock Input ExtTrig: External Trigger Signal CLK: Clock input for 8254 GATE: Gate input for 8254 COUT n: Signal output of Counter n V.ERF: Voltage Reference A.
3.2 Analog Input Signal Connection The ACL-8112 provides 16 single-ended or 8 differential analog input channels. The analog signal can be converted to digital value by the A/D converter. To avoid ground loops and obtain a more accurate measurement of the A/D conversion, it is quite important to understand the signal source type and how to choose the correct analog input mode: signal-ended or differential. The ACL-8112 allows for the configuration through jumpers.
n = 0, ..., 8 To A/D Converter AIHn Groun Signal Sourc + - AILn GND Vcm = VG1 - VG2 VG1 VG2 Figure 3.5 Ground source and differential input A differential mode must be used when the signal source is differential. A differential source means the ends of the signal are not grounded. To avoid dangerously high voltages between the local ground of the signal and the ground of the PC system, a shorted ground path must be connected. Figure 3.6 shows the connection for a differential source. n = 0, ...
If your signal sources contain both a floating and a local ground, you should use the differential mode, with the floating signal source connected as Figure 3.7 . n = 0, ..., 8 Floatin Signal Sourc AIHn High AILn Low To A/D Converter GND Figure 3.
3.3 Analog Output Signal Connection The ACL-8112 has two unipolar analog output channels. To make the D/A output connections from the appropriate D/A output, please refer Figure 3.8. -5 or -10 INT or Ext Pin-30 ( AO0) Ref In Pin-32 ( AO1) D/A Converter + To D/A Output Pin-14 ( A.GND) Analog GND Figure 3.8 Connection of Analog Output Connection 3.4 Digital I/O Connection The ACL-8112 provides 16 digital input and 16 digital output channels through CN1 and CN2 on board.
3.5 Timer / Counter Connection The ACL-8112 has an interval 8254 timer/counter on board. It offers 3 independent 16-bit programmable down counters; counter 1 and counter 2 are cascaded together as a timer pacer trigger for A/D conversions and counter 0 is free for user applications. Figure 3.10 shows the 8254 timer/counter connection.
3.6 Daughter Board Connection The ACL-8112 can be connected with any of the five following daughter boards, ACLD-8125, ACLD-9137, ACLD9182, ACLD9185, and ACLD9188. The functionality and connections are specified below. 3.6.1 Connect with ACLD-8125 The ACLD-8125 has a 37-pin D-sub connector, which can be connected to the ACL-8112HG through a 37-pin assemble cable. The most outstanding feature of this daughter board is the CJC ( cold junction compensation) circuit on board.
4 Registers A detailed description of the registers and its structure for the ACL-8112 are specified in this chapter. This information is useful for programmers who wish to handle the card through low-level programming. Hence, a low level programming syntax is also introduced. This information can also help beginners learn how to operate the ACL-8112 in the shortest possible time.
4.1 I/O Port Address The ACL-8112 requires 16 consecutive addresses in the PC I/O address space. Table 4.1 shows the I/O address of each register with respect to the base address. The function of each register is also listed.
4.2 A/D Data Registers The ACL-8112 series has a 12-bit resolution for each analog input channel, the digital data is store in the A/D data registers after an A/D conversion. The A/D data is put into two 8 bits registers. The lowest byte data (8 LSBs) are placed in address BASE+4 and the highest byte data (4 MSBs) are placed in address BASE+5. A DRDY bit is used to indicate the status of the A/D conversion. When the DRDY goes low, it means an A/D conversion is complete.
CS0 and CS1 are used to determine which MPC508A chip is selected. The MPC508A is used to multiplex between channels, when CS0 is set as 1, the analog input channels from 0 to 7 are selectable, and when CS1 is set to 1, channels 8 to 15 are selectable. When both CS0 and CS1 are set to 1, it means the analog inputs are in differential mode. The possible analog input channel selections combination is listed in the table below.
4.4 A/D Range Control Register The A/D range register is used to adjust the analog input ranges for the A/D channels. Two factor effects the input range: Gain and Polarity. For the ACL-8112PG, This register controls the PGA (programmable gain) directly and there is no Unipolar setting. When a different gain value is set, the analog input range is changed. For the ACL-8112DG/HG, both the PGA and polarity are controlled by this register. Table 4.
( This table is only for the ACL-8112DG: Low Gain Card) G3 G2 G1 G0 GAIN 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0.5 1 2 4 8 1 2 4 8 Bipolar or Unipolar Bipolar Bipolar Bipolar Bipolar Bipolar Unipolar Unipolar Unipolar Unipolar Input Range ± 10V ± 5V ± 2.5V ± 1.25V ± 0.625V 0V ~ 10V 0V ~ 5V 0V ~ 2.5V 0V ~ 1.25V Table 4.2-2 Function of the Gain Control Bits For the ACL-8112PG, the maximum range is changed by hardware jumper configuration.
4.5 A/D Operation Mode Control Register The A/D operation includes the analog signal conversion and the data transformation. This register controls the internal trigger mode and data transformation method. It is initialized by a software trigger or program polling transfer when the PC is reset or powered on. The details of the A/D operation are described in Chapter 5. There are four operation modes.
4.6 Interrupt Status Register The Interrupt Status Register is used to clear the interrupt status so a new interrupt can be generated. If the ACL-8112 is in interrupt data transfer mode, a hardware status flag will be set after each A/D conversion. You must clear the status flag by writing any data to this register, so that the ACL-8112 can generate a new or next interrupt if a new A/D conversion is to happen. Address : BASE + 8 Attribute: write only Data Format: Bit BASE+8 4.
4.8 Digital I/O register There are 16 digital input channels and 16 digital output channels provided by the ACL-8112. The address Base + 6 and Base + 7 are used for the digital input channels, and the address Base + 13 and Base + 14 are used for digital output channels.
4.9 D/A Output Register The D/A converter will convert the D/A output register data to an analog signal. The register data at address Base + 4 and Base + 5 are used for D/A channel 1and Base +6 and Base +7 for D/A channel 2.
4.10 Internal Timer/Counter Register Two 8254 counters are used for periodical triggering of the A/D converter, with one left for user applications. The 8254 occupies 4 I/O address locations in the ACL-8112 as listed blow. Users may refer to NEC's or Intel's data sheet for full detail of the 8254. Summarized information is specified in Appendix B.
5 Operation Theory The operation theory of the ACL-8112 card is described in this chapter. The function description include the A/D conversion, D/A conversion, digital I/O and counter / timer. The operation theory can help you understand how to manipulate or program the ACL-8112. 5.1 A/D Conversion Before programming the ACL-8112 to perform an A/D conversion, you need to understand the following issues: • A/D conversion procedure • A/D trigger mode • A/D data transfer mode • Signal Connection 5.
The A/D data should now be transferred into the PC's memory for further processing. The ACL-8112 provides three data transfer modes that allow users to optimize their DAS system. Refer to section 5.1.3 for data transfer modes. 5.1.2 A/D Trigger Modes The ACL-8112’s A/D conversion can be triggered by either an Internal or External trigger source. JP5 is used to set either internal or external triggers. Please refer to section 2.8 for details.
5.1.3 A/D Data Transfer Modes On the ACL-8112, there are three A/D data transfer modes that can be used when A/D conversion is completed. The data transfer mode is controlled by the mode control register (BASE+11). The different transfer modes are described below: Software Data Transfer Usually, this mode is used with software A/D trigger mode. After the A/D conversion is triggered by the software, the software will poll the DRDY bit until it becomes high.
5.2 D/A Conversion The operation of the D/A conversion is simpler than the A/D operation. You only need to write the digital values into the D/A data registers and the corresponding voltage will be outputted through AO1 or AO2. Refer to section 4.9 for information about the D/A data registers.
5.4 Timer/Counter Operation The ACL-8112 has an 8254 interval timer/counter on board. Refer to section 3.5 for signal connection and the configuration of the counter. The 8254 Timer / Counter Chip The Intel (NEC) 8254 contains three independent, programmable, multimode 16 bit counter/timers. The three independent 16 bit counters can be clocked at rates from DC to 5 MHz. Each counter can be individually programmed with 6 different operating modes by appropriately formatted control words.
I/O Address The 8254 in the ACL-8112 occupies 4 I/O address as shown below. BASE + 0 LSB OR MSB OF COUNTER 0 BASE + 1 LSB OR MSB OF COUNTER 1 BASE + 2 LSB OR MSB OF COUNTER 2 BASE + 3 CONTROL BYTE The programming of the 8254 is control by registers BASE+0 to BASE+3. The function of each register is specified in this section. For more detailed information, refer to the 8254 handbook. Control Byte Before loading or reading any of these individual counters, the control byte (BASE+3) must be loaded first.
0 1 Note 16-BITS BINARY COUNTER BINARY CODED DECIMAL (BCD) COUNTER (4 DIGITAL) The count of the binary counter is from 0 up to 65,535 and the count of the BCD counter is from 0 up to 9,999 Mode Definitions With the 8254, six operating modes can be selected. they are: • Mode 0: Interrupt on Terminal Count • Mode 1: Programmable One-Shot.
6 Calibration & Utilities With data acquisition processes, knowing how to calibrate your measurement devices to maintain its accuracy is very important. Users can calibrate the analog input and analog output channels under user’s operating environment to optimize the accuracy of the equipment. This chapter will guide you through how to calibrate the ACL-8112. 6.
6.2 VR Assignment There are 6 variable resistors (VR) on the ACL-8112DG/HG board. These allow you to make adjustment to the A/D and D/A channels. The function of each VR is specified as Table 6.1 -1. VR1 VR2 VR3 VR4 VR5 VR6 A/D full scale adjustment A/D bipolar offset adjustment D/A channel 1 full scale adjustment D/A channel 2 full scale adjustment A/D programmable amplifier offset adjustment A/D unipolar offset adjustment Table 6.
6.3.2 D/A CH2 calibration 6.4 1. Connect the DVM <+> to CN3.AO2, and the DVM<-> to CN3.GND . 2. Write a digital value into the D/A register (BASE+6 and BASE+7). 3. Trim VR4 until +5 V appears on the DVM. A/D Programmable Gain Amplifier adjustments This setup is to reduce the PGA offset voltage. 1. Connect CN3.AI0 to CN3.GND 2. Trim VR5 until the reading displayed on the monitor of the 8112UTIL.exe software is approximately 0 and below 0.50. 6.5 A/D Adjustment 6.
6.5.2 Unipolar Calibration(Only for ACL-8112DG/HG) 1. Adjust the voltage calibrator’s voltage output to –4.9987V . Connect the voltage calibrator’s <+> to CN3.AI0 and the voltage calibrator’s<-> to CN3.AGND. 2. Trim VR2 to obtain a reading that toggles between 0 and 1. This value is displayed on the monitor of the calibration program 8112UTIL.exe. Then proceed to the next step. 3. Adjust the voltage calibrator’s voltage output to +1.22mV. Connect the voltage calibrator’s <+> to CN3.
7 C Language Library There are 23 call functions available in the C programming Library, all functions associated with the ACL-8112 are covered, it includes A/D conversions, D/A conversions, Digital Inputs and Outputs, etc. Using the C Language library saves a lot of programming time. The library also covers support for data collection on the interrupt or DMA from the internal time clock for A/D conversions. Note that the DMA data transfer processes only on a fixed A/D channel.
7.1 _8112_Initial Description All ACL-8112 cards are initialized according to its card number and its corresponding base address. Every ACL-8112 Multi-Function Data Acquisition Card must be initialized using this function before any other function calls are permitted.
Example: #include "8112.h" main() { int ErrCode; Errcode = _8112_Initial( CARD_1, A8112B_HG, 0x210 ); if ( ErrCode != ERR_NoError ) exit(0); ErrCode = _8112_Initial( CARD_2, A8112B_DG, 0x220 ); if ( ErrCode != ERR_NoError ) exit(0); . . .
7.2 _8112_Switch_Card_No Description This function is used on a system that has two ACL-8112 card inserted. After initializing the two ACL-8112 cards, this function is called upon to select the default card. Note: This library only has support for two ACL-8112 because only two DMA channels are supported by the card.
7.3 _8112_DI Description This function is used to read data from the digital input port. There are 16 bits available for the digital inputs. Bit 0 to bit 7 of the register is defined as the low byte and bit 8 to bit 15 are defined as the high byte. Syntax int _8112_DI( int port_number, unsigned char *data ) int _8112pg_DI( int port_number, unsigned char *data ) Argument: port_number: To indicate which port is read, DI_LO_BYTE or DI_HI_BYTE.
7.4 _8112_DI _Channel Description This function is used to read data from the digital input channels (bit). There are 16 digital input channels on the ACL-8112. When performing this function, the digital input port is read and the value of the corresponding channel is returned. * channel means each bit of the digital input ports.
7.5 _8112_DO Description This function is used to write data to the digital output port. There are 16 digital outputs on the ACL-8112, they are divided into two categories, DO_LO_BYTE and DO_HI_BYTE. Channel 0 to channel 7 is defined as the DO_LO_BYTE port and channels 8 to 15 are defined as the DO_HI_BYTE port.
7.6 _8112_DA Description This function is used to write data to the D/A converter. There are two Digital-to-Analog conversion channels on the ACL-8112. The resolution of each channel is 12-bit, thus the digital data ranges is from 0 to 4095. Syntax int _8112_DA(int da_ch_no, unsigned int data ) int _8112pg_DA(int da_ch_no, unsigned int data ) Argument: da_ch_no: D/A channel number, DA_CH_1 or DA_CH_2. data: D/A converted value, if the value is greater than 4095, the higher 4-bits are negligent.
7.7 _8112_AD_Input_Mode Description This function is only used with the ACL-8112 ver. B series. The ACL-8112 offers either 16 single-ended analog input channels or 8 differential analog input channels. If the ACL-8112 ver B card is used, you have to call this function to initialize the A/D operation. Syntax int _8112_AD_Input_Mode( int ad_mode ) Argument: ad_ch_mode: SINGLE_ENDED: the analog inputs are single-ended mode. DIFFERENTIAL : the analog inputs are differential.
for( j = 0; j < 7 ; j++) { _8112_AD_Set_Channel( j ); printf( "AD channel %d is now selected.\n“, j ); } _8112_Switch_Card_No(CARD_1); _8112_AD_Input_Mode( SINGLE_ENDED) ; for( j = 0; j < 7 ; j++) { _8112_AD_Set_Channel( j ); printf( "AD channel %d is now selected.
7.8 _8112_AD_Set_Channel Description This function is used to set the AD channel by means of writing data to the multiplexer scan channel register. There are 16 single-ended A/D channels for the ACL-8112, so the channel number must be set to between 0 and 15. The initial state is channel 0, which is the default setting for the ACL-8112.
7.9 _8112_AD_Set_Range Description This function is used to set the A/D analog input range by means of writing data to the A/D range control register. There are two factors that will effect the analog input range - Gain and Input type. The Gain can be any of the following factors 0.5, 1, 5, 10, 50, 100, 500, and 1,000 for the ACL-8112HG card. The input type is either Bipolar or Unipolar. The initial value of the gain is '1‘ and input type is bipolar, which is preset by the ACL-8112 hardware.
For the ACL-8112DG card, the gain values supported are 1, 2, 4, and 8. The relationship between analog input voltage range, gain and input type are specified in the table below. ** this table only applies for the ACL-8112DG ( low gain) card. AD_INPUT GAIN AD_B_5_V AD_B_2_5_V AD_B_1_25_V AD_B_0_625_V AD_U_10_V AD_U_5_V AD_U_2_5_V AD_U_1_25_V 1 2 4 8 1 2 4 8 Input type (Bipolar or Unipolar) Bipolar Bipolar Bipolar Bipolar Unipolar Unipolar Unipolar Unipolar Input Range ± 5V ± 2.5V ± 1.25V ± 0.
Syntax int _8112_AD_Set_Range( int ad_range ) int _8112pg_AD_Set_Gain( int ad_range ) Argument: int ad_range: the programmable range of A/D conversion, pleas refer to above tables for the possible values . Return Code: ERR_NoError ERR_BoardNoInit ERR_AD_InvalidRange Example: #include “8112.
7.10 _8112_AD_Set_Mode Description This function is used to set the A/D trigger and data transfer mode by means of writing data to the mode control register. The hardware initial state for the ACL-8112 is set as AD_MODE_1 software( internal) trigger with program polling data mode.
Example: #include “8112.h” main() { _8112_Initial( CARD_1, A8112B_HG, 0x220 ); /* Assume NoError when Initialize ACL-8112 */ _8112_AD_Input_Mode( DIFFERENTIAL) ; /* set analog input mode as “differential” mode */ _8112_AD_Set_Range( AD_B_5_V ); printf( "The A/D analog input range is +/- 5V \n" ); _8112_AD_Set_Mode( AD_MODE_6 ); printf( "Now, disable internal trigger.
7.11 _8112_AD_Soft_Trig Description This function is used to trigger an A/D conversion using software trigger. When the function is called, a trigger pulse will be generated and the converted data will be stored at base address Base+4 and Base+5, and can be retrieved using function _8112_AD_Acquire(). Refer to section 7.12. Syntax int _8112_AD_Soft_Trig( void ) int _8112pg_AD_Soft_Trig( void ) Argument: None Return Code: ERR_NoError ERR_BoardNoInit Example: #include “8112.
7.12 _8112_AD_Aquire Description This function is used to poll an AD conversion. It will trigger an AD conversion, and read a 12-bit A/D data when the data is ready ('data ready' bit becomes low). Syntax int _8112_AD_Aquire( int *ad_data ) int _8112pg_AD_Aquire( int *ad_data ) Argument: ad_data: should 12-bit A/D converted value, the value within 0 to 4095. Return Code: ERR_NoError ERR_BoardNoInit ERR_AD_AquireTimeOut Example: #include “8112.
7.13 _8112_CLR_IRQ Description This function is used to clear an interrupt request which gets requested by the ACL-8112. If you used an interrupt to transfer an A/D converted data, you should use this function to clear the interrupt request status, otherwise new interrupts will not be generated.
7.14 _8112_AD_DMA_Start Description The function will perform an A/D conversion N times with DMA data transfer using the pacer trigger (internal timer trigger). It takes place in the background and will not stop until the Nth conversion has been performed or your program executes the _8112_AD_DMA_Stop() function to stop the process. After executing this function, it is necessary to check the status of the operation by using the function _8112_AD_DMA_Status().
count: the number of A/D conversion ad_buffer: the start address of the memory buffer to store the AD data, the buffer size must large than the numbers of AD conversion. c1: the 16-bit timer frequency divider of timer channel #1 c2: the 16-bit timer frequency divider of timer channel #2 Return Code: ERR_NoError ERR_BoardNoInit, ERR_InvalidADChannel, ERR_AD_InvalidRange, ERR_InvalidDMAChannel, ERR_InvalidIRQChannel, ERR_InvalidTimerValue Example: See Demo Program 'AD_Demo4.
7.15 _8112_AD_DMA_Status Description Since the _8112_AD_DMA_Start function is executed in the background, you can issue the function _8112_AD_DMA_Status to check its operation status. Syntax int _8112_AD_DMA_Status( int *status , int *count ) int _8112pg_AD_DMA_Status( int *status , int *count ) Argument: status: count: status of the DMA data transfer 0: AD DMA is not completed 1: AD DMA is completed the number of A/D data which has been transferred.
7.16 _8112_AD_DMA_Stop Description This function is used to stop the DMA data transfer. After executing this function, the internal A/D trigger is disabled and the A/D timer ( timer #1 and #2) is stopped. The function returns the number of data’s which have been transferred, no matter if the A/D DMA data transfer is stopped by this function or by the DMA terminal count ISR.
7.17 _8112_AD_INT_Start Description The function will perform an A/D conversion N times with interrupt data transfer using the pacer trigger. It takes place in the background which will not stopped until the Nth conversion has completed or your program executes the _8112_AD_INT_Stop() function to stop the process. After executing this function, it is necessary to check the status of the operation by issuing the 8112_AD_INT_Status() function.
Return Code: ERR_NoError ERR_BoardNoInit ERR_InvalidADChannel ERR_AD_InvalidRange ERR_InvalidIRQChannel ERR_InvalidTimerValue Example: See demo Program 'AD_Demo2.C' 7.18 _8112_AD_INT_Status Description Since the _8112_AD_INT_Start() function is executed in the background, you can issue the function _8112_AD_INT_Status to check the status of the interrupt operation.
7.19 _8112_AD_INT_Stop Description This function is used to stop the interrupt data transfer function. After executing this function, the internal AD trigger is disabled and the AD timer is stopped. The function returns the number of data which has been transferred, no matter whether the AD interrupt data transfer is stopped by this function or by the _8112_AD_INT_Start() itself.
7.20 _8112_AD_Timer Description This function is used to setup Timer #1 and Timer #2. Timer #1 & #2 are used as frequency dividers for generating constant A/D sampling rate. It is possible to stop the pacer trigger by setting any one of the dividers to 0. The AD conversion rate is limited by the conversion time of the AD converter, the highest sampling rate of the ACL-8112 can not exceed 100KHz, thus the multiplication of the dividers must be larger than 20.
7.21 _8112_TIMER_Start Description Timer #0 on the ACL-8112 is freely available to be programmed by the users. This function is used to program Timer #0. This timer can be used as a frequency generator if an internal clock is used. It also can be used as an event counter if an external clock is used.
7.22 _8112_TIMER_Read Description This function is used to read the counter value of Timer #0. Syntax int int _8112_TIMER_Read( unsigned int *counter_value ) _8112pg_TIMER_Read( unsigned int *counter_value ) Argument: counter_value: the counter value of the Timer #0 Return Code: ERR_NoError ERR_BoardNoInit Example: See demo program 'TMR_DEMO.C' 7.23 _8112_TIMER_Stop Description This function is used to stop the timer operation. The timer is set to 'One-shot' mode with counter value ' 0 '.
Appendix A. Demo Programs In this software diskette, there are 8 example programs provided. It will help with programming applications using the C Language Library. The description of these programs are describe below: AD_DEMO1.C: AD_DEMO2.C AD_DEMO3.C: AD_DEMO4.C: DA_DEMO.C: DI_DEMO.C: DO_DEMO.C: TMR_DEMO.C: A/D conversion using software trigger and program data transfer. A/D conversion using interrupt and program data transfer. A/D conversion using DMA data transfer.
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