NuDAQ® ACL-8454 Multi-Functions Counter/Timer Card User’s Manual Recycled Paper
© Copyright 1997~2001 ADLINK Technology Inc. All Rights Reserved. Manual Rev. 1.40: March 21, 2001 Part No. 50-11017-101 The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer.
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Table of Contents Chapter 1 INTRODUCTION............................................. 1 1.1 1.2 1.3 Features...................................................................................3 Applications .............................................................................3 Specifications...........................................................................4 Chapter 2 INSTALLATION & CONFIGURATIONS......... 5 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 2.10 2.11 2.12 2.13 2.14 2.15 What You Have...
4.6 4.7 4.8 4.9 Pulse Width Measurement ....................................................33 Frequency Measurement.......................................................34 Event Counter........................................................................36 Double Interrupt System ........................................................37 Chapter 5 HIGH-LEVEL PROGRAMMING ................... 38 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 5.10 5.11 Installation..................................................
How to Use This Guide This manual is designed to help you use the ACL-8454. The manual describes how to modify various settings on the ACL-8454 card to meet your requirements. It is divided into 5 chapters: • Chapter 1, "Introduction" gives an overview of the product features, applications and specifications. • Chapter 2, "Installation & Configurations" describes the operation method and multi-functions of the ACL-8454.
1 Introduction The ACL-8454 is a general purpose counter/timer and digital I/O card. It is a compact-size add-on card for IBM AT compatible PC in control, monitoring and sensing applications. There are two version of ACL-8454: ACL-8454/6 and ACL-8454/12. ACL-8454/6 has two 8254 chips (6 counters) on board. ACL-8454/12 has four 8254 chips (12 counters). On ACL-8454/6, four counters are used for external signal, two counters are cascaded as 32-bit timer.
The card also provides digital output and input port. There are 8 digital output channels and these channels can be used to control the external devices. There are digital input channels and these channels are shared the same signal lines with the external clock and the external gate signals. Whenever the external clock or gate signals are not used, they can be dedicatedly used as D/I. There are at least 8 D/I bits under default setting of the ACL-8454 because only two 8254 chips are used.
1.1 Features The ACL-8454 Counter/Timer and digital I/O Card provides the following advanced features: • Default 6 counters/timers are installed and it is expandable to 12 counters/timers at most • Multi-configurations of counters/timers: • Flexible setting for each independent counter, the clock source could be external, internal or cascaded. The gate signal is external controlled or internal cascaded signal.
1.
2 Installation & Configurations This chapter describes the configuration and function of the ACL-8454 and the steps to install the ACL-8454. At first, the contents in the package and unpacking information that you should care about are described. The versatile configurations of ACL-8454 are introduced so that you can configure it according to your applications. The default setting of ACL-8454 is shown at the end of this chapter. 2.
2.2 Unpacking Your ACL-8454 card contains sensitive electronic components that can be easily damaged by static electricity. The card should be unpacked on a grounded anti-static mat. The operator should be wearing an anti-static wristband, grounded at the same point as the anti-static mat. Inspect the card module carton for obvious damage. Shipping and handling may cause damage to your module. Be sure there are no shipping and handing damages on the module before processing.
2.4 Default Configurations To operate the ACL-8454 correctly, users should understand the structure of ACL-8454 and details of the possible configurations. The block diagram of the ACL-8454 is shown in chapter 1. It contains the clock system, counter system, interrupt system and address decoder etc. The following sections describe the details and the default setting is list in Table 2.1.
2.5 Base Address Setting The ACL-8454 requires 8 consecutive address locations in the I/O address space. The base address of the ACL-8454 is restricted by the following conditions. 1. The base address must be within the range Hex 200 to Hex 3FF. 2. The base address should not conflict with any reserved I/O address. 3. The base address must not conflict with any add-on card on your own PC. Please check your PC before installing the ACL-8454.
I/O port Address (Hex) 200-207 208-20F 210-217 218-21F : 237-23F 240-247 (default) 248-24F : 3F0-3F7 3F8-3FF 1 A8 2 A7 3 A6 4 A5 5 A4 6 A3 ON (0) ON (0) ON (0) ON (0) : ON (0) ON (0) ON (0) : OFF (1) OFF (1) ON (0) ON (0) ON (0) ON (0) : ON (0) ON (0) ON (0) : OFF (1) OFF (1) ON (0) ON (0) ON (0) ON (0) : ON (0) OFF (1) OFF (1) : OFF (1) OFF (1) ON (0) ON (0) ON (0) ON (0) : OFF (1) ON (0) ON (0) : OFF (1) OFF (1) ON (0) ON (0) OFF (1) OFF (1) : OFF (1) ON (0) ON (0) : OFF (1) OFF (1) ON (0) OF
2.
2.7 Clock System The clock system of ACL-8454 provides the internal clock source for the 8254 chips. The block diagram of the clock system is shown in the Figure 2.4. Two clock sources, which named as CLOCK1 and CLOCK2, are divided from the internal 10Mhz signal. The clock of every counter/timer can be one of the 4 sources: CLOCK1, CLOCK2, external clock source or cascaded source from the ‘last’ channel. Refers to next section for details of setting clock for each counter/timer.
CLOCK1 (High Frequency) The clock source of CLOCK1 can be set by jumper ‘CLOCK1’. The frequency could be 10 MHz or 2 MHz. Figure 2.5 shows the jumper setting and the corresponding frequency. The default setting of CLOCK1 is using 2 MHz. CLOCK1= 2 MHz CLOCK1= 10 MHz CLOCK1 CLOCK1 10M 2M 2M 10M (Default) Figure 2.5 Jumper setting of CLOCK1 CLOCK2 (Low Frequency) The clock source of CLOCK2 can be set by jumper ‘CLOCK2’. The frequency could be 1 MHz or 100 KHz which are divided from CLOCK1.
2.8 Counters Architecture There are at most four 8254 chips on the ACL-8454 card. The chip #1 (U1) and chip #2 (U2) are default mounted on the card, therefore 6 counters are default on board. It is possible to expand to four 8254 chips by plugging the additional chip #3 (U3) and chip #4 (U4) into ACL-8454 and totally 12 counters are available. The default counters on chip #1 and #2 are labeled as counter #1 to counter #6. The expandable counters on chip #3 and #4 are labeled as counter #7 to counter #12.
There are three signals (2 input,1 output) for each counter, a clock input signal, a gate control signal, and an output signal. The Figure 2.7 illustrates the block diagram of the 8254 counter. CLK1 ~ CLK12 are clock sources and GATE1 ~ GATE12 are gate control signals. The COUT1 ~ COUT12 are outputs of the counters. The Figure 2.8 shows all the labels and the inter-connection of the 8254 counters when all the 4 chips are installed. The COUT5 and COUT11 are used only for internal.
Independent Counters (Counter #1~#4, & Counter #7~#10) The Counter #1 to Counter #4 and Counter #7 to Counter #10 are independent because the clock source and gate control of those counters can be set independently. These 8 counters are named as independent counters. 8254 Chip #1 CLK1 C GATE1 Counter #1 O COUT1 G Figure 2.9 Example of ‘independent counters’ Cascaded Counters The connection of Counter #5, #6 and Counter #11, #12 are different with other independent counters.
The ACL-8454 provides multi-configurations for many situations. Users may need more independent counters for some applications. Users can installed one more 8254 to chip #3(U3) by yourself to get 3 more independent counters. It is also possible to install one more 8254 chip to #4(U4) and get one more set of cascaded counter or to get another internal interrupt source(refer to section 2.11). The versatile configurations of ACL-8454 depend on user‘s applications.
The two internal clock sources, CLOCK1 and CLOCK2 come from the clock system (see 'Clock System section'). The cascaded clock source comes from the output of the counter with smaller channel number. For example, the COUT1 is cascaded to source of CLK2; the COUT3 is cascaded to source of CLK4. The exceptions are the cascaded source of CLK1 comes from COUT4 and the cascaded source of CLK7 comes from COUT10. The external clock source named as ECLK n comes from the 37-pins connector. Figure 2.
(3) Use cascaded clock source from the last channel. I II CK n CLK n III IV I: II: III: IV: CLOCK1 CLOCK2 LAST CHANNEL EXTERNAL (4) Use external clock source ECLK n. I II CK n CLK n III IV I: II: III: IV: CLOCK1 CLOCK2 LAST CHANNEL EXTERNAL The Table 2.4 shows the reference number of the clock source jumpers and its corresponding counter/timer channels number. The default setting of every jumper is also shown.
2.10 Gate Control Configurations The gate control signals of the independent counters are internally pulled high hence they are default enabled if no external gate used. When the external gate signals are used, the counters can be used to measure pulse width. Moreover, the gate of counter #1 ~ #4 come from the reverse of counter #6 output by jumper selecting. Therefore, the time interval of the counter gate can be precisely controlled and frequency measurement is possible. Figure 2.
The timer/counter output signals (COUT n) of 8254 are controlled by clock source, gate control and software program. All the outputs of the 8 independent counters are sent to the 37 pins connector directly. The COUT6 and COUT12 of the two pairs of cascaded counters are also sent to connector. Therefore, totally 10 counter outputs are sent to connector, see 'Pin assignment' for corresponding signal pin number.
IRQ X 15 12 11 10 /COUT6 High IRQ Level JP1 Ext.Int. COUT12 (ECLK10) IRQ 3 5 6 7 9 Low IRQ Level JP3 JP2 Figure 2.15 Block diagram of interrupt system The default setting of the high and the low IRQ levels come from /COUT6 and ECLK10 respectively. The interrupt system on ACL-8454 is very flexible to use. No matter under any system configuration, it is possible to generate interrupt internally or externally.
To program digital I/O operation is fairly straightforward. The digital input operation is just to read data from the corresponding registers, and the digital output operation is to write data to the corresponding registers. The digital I/O registers‘ format are shown in section 3.11. It is not necessary to set any jumper for digital I/O. 2.14 Summary of Default Setting • Chip #1 and chip #2 are installed. Counter #1 ~ counter #6 are available. Chip #3 and chip #4 are not installed.
2.15 Notes for Installing More 8254 Chips The user can install 8254 chips to ACL-8454 card by yourself. Before install the additional 8254 chip, please make sure the ACL-8454 card is removed from the PC slot, no power is applied and no external daughter board is attached. When plugging 8254 chips, please check the pin of chips must not be fold and install the chip into the socket carefully. After installing the chip, please configure the jumper setting of the ACL-8454 card according to your application.
3 Registers Format This chapter describes details of the register format of the ACL-8454. This information is quite useful for the programmers who wish to handle the card by low-level program. In addition, the low level programming is introduced. This information can help the beginners to manipulate the ACL-8454 in the shortest learning time. 3.1 I/O Port Address The ACL-8454 requires 6 consecutive addresses in the PC I/O address space.
3.2 Timer/Counter Registers Every 8254 occupies 4 I/O address locations in the ACL-8454 as shown below. Condensed information is specified in Appendix B Timer/Counter Operation. Users can refer to Tundra’s website (“http://www.tundra.com”) or Intel's data sheet for a fully descriptions of the 8254 features (see “http://support.intel.com/support/controllers/peripheral/231164.htm”). Note that only one 8454 chip can be enabled at the same time.
3.4 Digital Input Registers There are 16 digital input channels on the ACL-8454. The digital input channels are common with the external gate signals (ExtG 1~3 & ExtG 7~10) and the external clock signals (ECLK 1~3 & ECLK 7~10).The external clock source ECLK n and external gate control ExtG n can be read back from the DI ports. When the external clock sources and the external gate signals are not used for counters, these channels can be used as digital input signal dedicatedly.
3.6 Low-level Programming To manipulate the ACL-8454, users may understand how to write a hardware dependent low-level program. Using either assembly or high-level language such as BASIC or C language can carry out the low-level programming. The following gives examples to show how to use programming language to access an add-on I/O card. Getting Start Before programming, the add-on card should be correctly installed.
BASIC language To write an output port: 10 BASE=&H240 20 VALUE% = &H2F 30 OUT( BASE+2), VALUE % or 10 OUT( &H242 ), &H20 To read an input port 10 BASE=&H240 20 VALUE=INP( BASE+2) or 10 VALUE=INP( &H242 ) C language (Borland C++) To write an output port: #define BASE 0x240 unsigned int Value=0x2F; outportb( BASE+2 , Value ); or outportb( 0x242 , 0x2F ); To read an input port #define BASE 0x240 unsigned int Value; Value = inportb( BASE+2 ); or Value = inportb( 0x242 ); Perform Functions Users should study the
4 Signal Connections & Applications This chapter describes the connectors and some application wiring of the ACL-8454. Including the signal connection between the ACL-8454 and external devices, such as daughter boards or other devices. 4.1 Connectors Pin Assignment The ACL-8454 comes equipped with a D-type 37 pin female connector (CN1). The CN1 is located at the rear plate. The pin assignment of the connector is illustrated in the Figure 2.1. Refer to section 2.1 for details of pin assignment. 4.
4.3 Digital I/O Connection The ACL-8454 provides 16 digital input and 8 digital output channels through the connector CN1. The digital I/O signals are fully TTL/DTL compatible. Digital Input(DI) From TTL Devices Digital Output (DO) To TTL Devices GND ACL-8454 Outside Device Figure 4.1 Digital I/O Connections 4.4 Timer / Counter Connection The ACL-8454 has four 8254 chips on board. It offers 8 independent 16-bit programmable down counters and two pairs of cascaded counters.
4.5 Frequency Generator Example 1 : To generate a 250 KHz Square Wave. step 1: To use fixed clock source because the output is a fixed frequency. step 2: Internal 2 MHz clock source is suitable to generate a 250 KHz square wave. Use Counter #4 for this application. 50 KHz = 2 MHz / 8 Set jumper ‘CK4’. The clock source is coming from internal ‘CLOCK1’. Note that the CLOCK1 must be set as 2 MHz. However, the CLOCK1 is shared with other counters.
360,000,000 = 60000 x 6000 Therefore, ‘user configurable cascaded counters’ can be used to solve this problem. The counter #1 and #2 are used in this example. step 3: Set jumper ‘CK1’. The clock source is internal ‘CLOCK2’ and it is set as 100 KHz in default. Then set jumper ‘CK2’ and the clock source is coming for the output of the ‘Last channel (#1)‘. step 4: Skip these steps. step 5: Write and verify the control program for counter #1. step 6: Skip these steps.
4.6 Pulse Width Measurement Example : To measure pulse width (with ∆T < 32ms) step 1: To use fixed clock source as base time interval (or base frequency). step 2: Assume Internal 2M Hz clock is used. The time base is ∆t = 1/2M=5x10e-7 sec The count range for measuring pulse width is: ∆t < pulse width < ∆t *65535 (=32.768 msec) If the specification of the pulse width to be measured is in the range, the 2M Hz can be used. Otherwise changing the base frequency of the counter.
4.7 Frequency Measurement Example : To measure frequency around 1~100 K Hz step 1: This application needs two counters. One counter is used to generate a pulse whose time interval is very precise. The pulse is used to enable the other counter (counting counter) by gate control. On ACL-8454, internal gate control is possible. The internal gate is coming from /COUT6. In this example, the pulse generate is counter #6 and the counter #1 is used to measure frequency.
COUT5 C 'H' Counter #6 O COUT6 G Jumper CK1 frequency to be measured Precise Time Interval 8254 Chip #2 8254 Chip #1 C Counter #1 O COUT1 G Jumper G1 /COUT6 'H' enable counter #1 Figure 4.5 Example of frequency measurement (1) The ACL-8454 can synchronously measure frequency from four channels because the internal gate control is connected to 4 counters (#1~4) in the same time. Furthermore, as the gate signal goes low, an interrupt is generated.
4.8 Event Counter Example : To count external event in 1 sec step 1: This application needs one counter to generate a time base of 1 sec and the second counter to count the event. The cascaded counter #5, #6 can perform the watchdog timer. Counter #1 is used as an example to count external event. The clock source of counter #1 is the event signal and the frequency is not fixed. step 2~6: Skip these steps. step 7: The gate source is always enabled and the external gate must be removed.
4.9 Double Interrupt System One Internal plus one external interrupt sources The ACL-8454 provides double interrupt sources which are very useful in some application. For example, most of the application needs a watchdog timer to monitor the system periodically, hence, an IRQ channel is used. In addition, the emergency control may be necessary, hence, an additional external IRQ channel is helpful to handle the situation. Therefore, double interrupt level is necessary.
5 High-Level Programming There are more than 10 functions provided by the C language library. By using the C language library, it saves a lot of programming time. If you need to perform some special functions which are not provided in the library, you can modify the library according to your requirement. The fully commented C source of the library is also included in your software library diskette. It is a good starting point for C language programmers who wish to modify the functions in the library.
♦ With CD-ROM: 1. Turn your PC's power switch on. 2. Put the CD-ROM into your CD-ROM drive. 3. Type the commands: Dos: X:\> CD\NuDAQISA\8454\DOS X:\NuDAQISA\8454\DOS> SETUP (x identifies the drive that contains the CD-ROM) After installation, all the files of ACL-8454 Library & Utility for DOS are stored in C:\ADLink\8454\DOS directory. Windows 3.
[Win-NT only] When the software component installation process is completed and the system that ACL-8454 Library is installed on is Windows NT, Setup will launch the Driver Registry Utility (8454Util.exe) for you to make the registry of the drivers that you want to perform interrupt operation. The Driver Registry Utility first shows the following window. If 8454 driver has been registered, it will be shown on the Registered Driver list.
If you don’t need to use both of these two IRQ lines, set the unused IRQ level as “0”. Then you can save one IRQ level for your system. After the setting for IRQs level and base address, click “OK” to register the driver. When you finish the driver register, select “Done” or “Exit!” to exit this utility. To make the registered drivers work, you have to re-start Windows NT system.
5.2 W_8454_Initial @ Description To initial the base address used which used by the following functions. The default base address set in the library is 0x240. However, you should call this function before using others functions. @ Syntax Microsoft C/C++ (Windows, Win95 & Win-NT) int W_8454_Initial(int base_address) Visual Basic Windows 3.
5.3 Set_Chip @ Description This is a macro which is used to select or active one of the four 8254 chips. Refer the 8454.H for the definition of the Set_Chip macro. This macro is used by other functions in this library, it may not necessary be used by users. @ Syntax Microsoft C/C++ (DOS, Windows, Win95 & Win-NT) Set_Chip( int ChipNo ) @ Arguments int ChipNo : chip number, equal 1 to 4. @ Return Value No return value 5.4 W_8454_Write_Counter @ Description To write a command to a counter.
@ Arguments int CntrNo : Counter number, equals to 1~12 int Mode : Operation mode of counter, equals to 1 ~6 unsigned int CntrVal :The 16 bits counter value to write to the counter. @ Return Value No_Error : No error Invalid_Counter_No : CntrNo is out of range. Invalid_Timer_Mode : Mode is out of range 5.5 W_8454_Read_Counter @ Description To read the counter value from a counter.
5.6 W_8454_Stop_Counter @ Description This function is used to stop a specified counter. The user can directly assign the counter number 1~12, therefore it is not necessary to care about the chips number and other details. @ Syntax Microsoft C/C++ (Windows, Win95 & Win-NT) int W_8454_Stop_Counter (int CntrNo, unsigned int *CntrVal) Visual Basic Windows 3.
5.7 W_8454_DO @ Description To write an 8 bits data to the digital output port. @ Syntax Microsoft C/C++ (Windows, Win95 & Win-NT) int W_8454_DO (int DO_Value) Visual Basic Windows 3.11 Version: W_8454_DO (ByVal DO_Value As Integer) As Integer Win-95 or Win-NT Version: W_8454_DO (ByVal DO_Value As Long) As Long C/C++ (DOS) int _8454_DO(int DO_Value ) @ Arguments DO_Value : the value to write to digital output port, only the 8 LSBs of the value are effective. @ Return Value Always no error 5.
W_8454_DI_L (DI_LValue As Long) As Long W_8454_DI_H (DI_HValue As Long) As Long W_8454_DI_bit (ByVal Bit_No As Long) As Long C/C++ (DOS) int _8454_DI( UINT *DI_Value ) int _8454_DI_L( UINT *DI_LValue ) int _8454_DI_H( UINT *DI_HValue ) int _8454_DI_bit( int Bit_No ) @ Arguments UINT *DI_Value : the 16 bits digital input value of port BASE+4 and BASE+5 UINT *DI_LValue : the digital input value of port BASE+4, note that only the low 8 bits is effective UINT *DI_HValue : the digital input value of port BASE+5,
@ Syntax Microsoft C/C++ (Windows, Win95 & Win-NT) W_8454_Interrupt_on_TC(CN,Val) == W_8454_Write_Counter( CN, 0, Val ) W_8454_One_Shoot(CN,Val) == W_8454_Write_Counter( CN, 1, Val ) W_8454_Square_Wave(CN,Val) == W_8454_Write_Counter( CN, 2, Val ) W_8454_Rate_Generator(CN,Val) == W_8454_Write_Counter( CN, 3, Val ) W_8454_SW_Strobe(CN,Val) == W_8454_Write_Counter( CN, 4, Val ) W_8454_HW_Strobe(CN,Val) == W_8454_Write_Counter( CN, 5, Val ) C/C++ (DOS) _8454_Interrupt_on_TC(CN,Val) _8454_One_Shoot(CN,Val) _84
@ Syntax Microsoft C/C++ (Win95 & Win-NT) int W_8454_INT_Enable(int irq_no, int irql, HANDLE *phEvent) Visual Basic (Win95 & Win-NT) W_8454_INT_Enable (ByVal irq_no As Long, ByVal irql As Long, phEvent As Long) As Long @ Arguments irq_no : IRQ channel selected 1: Higher IRQ (From /COUT6) 2: Lower IRQ (From COUT12 or Ext. Int) irql : The IRQ level of the IRQ channel specified in argument irq_no. phEvent: The handle of the event for interrupts signals. @ Return Value NoError INT_Not_Set 5.
Appendix A Using of IRQ Channels IRQ Level 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Used by It is used by motherboard and not available on expansion slot. It is used by motherboard (key-board) and not available on expansion slot. It is re-directed from IRQ9. COM2: RS-232 COM1: RS-232, it is usually occupied by mouse It is used by motherboard and not available on expansion slot Re-direct to IRQ 2 It is used by motherboard (math co-processor) and not available on expansion slot.
Appendix B Timer/Counter Operation The ACL-8454 has at most four 8254 chips on board. Refer to section 2.8 for the signal connection and the configuration of these counters. The following sections are some brief concepts of the 8254 chip. The 8254 Timer / Counter Chip The Intel (NEC) 8254 contains three independent, programmable, multimode 16 bit counter/timers. The three independent 16 bit counters can be clocked at rates from DC to 5 MHz.
Control Byte Before loading or reading any of these individual counters, the control byte (BASE+3) must be loaded first.
Mode Definitions In 8254, six operating modes can be selected. They are: • Mode 0: Interrupt on Terminal Count • Mode 1: Programmable One-Shot • Mode 2: Rate Generator • Mode 3: Square Wave Rate Generator • Mode 4: Software Triggered Strobe • Mode 5: Hardware Triggered Strobe All detailed descriptions of these modes are written in Intel's data sheet (“http://support.intel.com/support/controllers/peripheral/231164.htm”).
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