cExpress-BT User’s Manual Manual Revision: 1.
Revision History Revision Description Date By 1.00 Initial release 2014-07-23 JC 1.
Preface Copyright 2014 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. Disclaimer The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer.
Table of Contents Revision History ............................................................................................................ 2 Preface............................................................................................................................ 3 1. Introduction .......................................................................................................... 8 2. Specifications.......................................................................................
3.3.8. LPC Bus ..............................................................................................................................................21 3.3.9. USB ....................................................................................................................................................21 3.3.10. USB Root Segmentation ..................................................................................................................22 3.3.11. SPI (BIOS only) ............
.2. I/O Map............................................................................................................................... 41 6.3. Interrupt Request (IRQ) Lines ............................................................................................. 42 6.3.1. PIC Mode ...........................................................................................................................................42 6.3.2. APIC Mode........................................................
8. BIOS Checkpoints, Beep Codes ......................................................................... 64 8.1. Checkpoint Ranges ............................................................................................................. 65 8.2. Standard Checkpoints......................................................................................................... 65 8.2.1. SEC Phase .............................................................................................................
1. Introduction The cExpress-BT is a COM Express® COM.0 R2.1 Type 6 module supporting the Intel® Atom™ processor E3800 Series and Intel® Celeron® processor system-on-chip (SoC). The cExpress-BT is specifically designed for customers who need high-level processing and graphics performance with low power consumption in a long product life solution.
2. Specifications 2.1. ¾ Core System CPU: Single, dual or quad-core Intel® Atom™ or Celeron® Processor • • • • • • • Atom™ E3845 1.91 GHz 542/792 (Turbo) 10W (4C/1333) Atom™ E3827 1.75 GHz 542/792 (Turbo) 8W (2C/1333) Atom™ E3826 1.46 GHz 533/667 (Turbo) 7W (2C/1066) Atom™ E3825 1.33 GHz 533 (No Turbo) 6W (2C/1066) Atom™ E3815 1.46 GHz 400 (No Turbo) 5W (1C/1066) Celeron® N2930 1.83/2.16 (Burst) GHz, 313/854 (Turbo) 7.5W (4C/1333) Celeron® J1900 2.0/2.
2.5. ¾ Video GPU Feature Support: 7th generation graphics Intel core architecture with four execution units supporting two independent displays • • • • 3D graphics hardware acceleration Support for DirectX11, OCL 1.1, OGL ES Halt/2.0/1.1, OGL 3.2 Video decode hardware acceleration including support for H.264, MPEG2, VC-1, WMV and VP8 formats Video encode hardware acceleration including support for H.264, MPEG2 and MVC formatsPlayback of Blu-ray disc S3D content using HDMI (1.
2.10. Power Specifications ¾ Power Modes: AT and ATX mode (AT mode start controlled by SEMA) ¾ Standard Voltage Input: ATX = 12V ±5%, 5Vsb ±5% or AT = 12V ±5% ¾ Wide Voltage Input: ATX = 5~20 V, 5Vsb ±5% or AT = 5 ~20V ¾ Power Management: ACPI 4.0 compliant, Smart Battery support ¾ Power States: supports C1-C6, S0, S1, S4, S3, S5, S5 ECO mode (Wake-on-USB S3/S4, WoL S3/S4/S5) ¾ ECO mode: supports deep S5 for 5Vsb power saving 2.11. Power Consumption TBD 2.12.
2.16.
2.17. Mechanical Dimensions connector on bottom side Top View Side View All tolerances ± 0.05 mm Other tolerances ± 0.
3. Pinouts and Signal Descriptions 3.1. AB / CD Pin Definitions The cExpress-BT is a Type 6 module supporting USB 3.0 and DDI channels on the CD connector. In the table below, all standard pins of the COM Express specification are described, including those not supported on the cExpress-BT.
Row A Row B Row C Row D Pin Name Pin Name Pin Name Pin Name A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 USB6USB6+ USB_6_7_OC# USB4USB4+ GND (FIXED) USB2USB2+ USB_2_3_OC# USB0USB0+ VCC_RTC EXCD0_PERST# EXCD0_CPPE# LPC_SERIRQ GND (FIXED) PCIE_TX5+ PCIE_TX5GPI0 PCIE_TX4+ PCIE_TX4GND PCIE_TX3+ PCIE_TX3GND (FIXED) PCIE_TX2+ PCIE_TX2GPI1 PCIE_TX1+ PCIE_TX1GND GPI2 PC
Row A Row B Row C Row D Pin Name Pin Name Pin Name Pin Name A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94 A95 A96 A97 A98 A99 A100 A101 A102 A103 A104 A105 A106 A107 A108 A109 A110 LVDS_A_CK+ * LVDS_A_CK- * LVDS_I2C_CK * LVDS_I2C_DAT * GPI3 RSVD RSVD PCIE0_CK_REF+ PCIE0_CK_REFGND (FIXED) SPI_POWER SPI_MISO GPO0 SPI_CLK SPI_MOSI TPM_PP TYPE10# SER0_TX / CAN_TX SER0_RX / CAN_RX GND (FIXED) SER1_TX SER1_RX LID# ** VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V GND (FIXED) B81 B82 B83 B
3.2. Signal Description Terminology The following terms are used in the COM Express AB/CD Signal Descriptions below. I Input to the Module O Output from the Module I/O Bi-directional input / output signal OD Open drain output I 3.3V Input 3.3V tolerant I 5V Input 5V tolerant O 3.3V Output 3.3V signal level O 5V Output 5V signal level I/O 3.3V Bi-directional signal 3.3V tolerant I/O 5V Bi-directional signal 5V tolerant I/O 3.3Vsb Input 3.
3.3. AB Signal Descriptions 3.3.1. Audio Signals Signal Pin # Description I/O AC_RST# / HDA_RST# A30 Reset output to CODEC, active low. O 3.3VSB AC_SYNC / HDA_SYNC A29 Sample-synchronization signal to the CODEC(s). O 3.3V AC_BITCLK / HDA_BITCLK A32 Serial data clock generated by the external CODEC(s). I/O 3.3V AC _SDOUT / HDA_SDOUT A33 Serial TDM data output to the CODEC. O 3.3V AC _SDIN[2:0] HDA_SDIN[2:0] B28 B30 Serial TDM data inputs from up to 3 CODECs. I/O 3.3VSB 3.3.2.
Signal Pin # Description I/O LVDS_B0+ LVDS_B0LVDS_B1+ LVDS_B1LVDS_B2+ LVDS_B2LVDS_B3+ LVDS_B3- B71 B72 B73 B74 B75 B76 B77 B78 LVDS Channel B differential pairs O LVDS LVDS_B_CK+ LVDS_B_CK- B81 B82 LVDS Channel B differential clock O LVDS LVDS_VDD_EN A77 LVDS panel power enable O 3.3V LVDS_BKLT_EN B79 LVDS panel backlight enable O 3.3V LVDS_BKLT_CTRL B83 LVDS panel backlight brightness control LVDS_I2C_CK A83 LVDS_I2C_DAT A84 3.3.4. PU/PD Comment O 3.
Signal Pin # Description I/O SATA1_TX+ SATA1_TX- B16 B17 Serial ATA channel 1, Transmit Output differential pair. O SATA AC coupled on Module SATA1_RX+ SATA1_RX- B19 B20 Serial ATA channel 1, Receive Input differential pair. I SATA AC coupled on Module SATA2_TX+ SATA2_TX- A22 A23 Serial ATA channel 2, Transmit Output differential pair. O SATA Not supported SATA2_RX+ SATA2_RX- A25 A26 Serial ATA channel 2, Receive Input differential pair.
3.3.7. Express Card Signal Pin # Description I/O PU/PD EXCD0_CPPE# EXCD1_CPPE# A49 B48 PCI ExpressCard: PCI Express capable card request I 3.3V PU 10k 3.3V EXCD0_PERST# EXCD1_PERST# A48 B47 PCI ExpressCard: reset O 3.3V 3.3.8. LPC Bus Signal Pin # Description I/O LPC_AD[0:3] B4-B7 LPC multiplexed address, command and data bus I/O 3.3V LPC_FRAME# B3 LPC frame indicates the start of an LPC cycle O 3.3V LPC_DRQ0# LPC_DRQ1# B8 B9 LPC serial DMA request I 3.
Signal Pin # Description I/O PU/PD Comment USB_4_5_OC# B38 USB over-current sense, USB ports 4 and 5. A pull-up for this line shall be present on the module. An open drain driver from a USB current monitor on the carrier board may drive this line low. I 3.3VSB PU 10k 3.3VSB Do not pull high on carrier USB_6_7_OC# A38 USB over-current sense, USB ports 6 and 7. A pull-up for this line shall be present on the module.
3.3.12. Miscellaneous Signal Pin # Description I/O PU/PD SPKR B32 Output for audio enunciator, the “speaker” in PC-AT systems O 3.3V WDT B27 Output indicating that a watchdog time-out event has occurred. O 3.3V THRM# B35 Input from off-module temp sensor indicating an over-temp situation. I 3.3V THRMTRIP# A35 Active low output indicating that the CPU has entered thermal shutdown. O 3.3V FAN_PWMOUT B101 Fan speed control.
Signal Pin # Description I/O PU/PD GPO[3] B63 General purpose output pins. O 3.3V GPI[0] A54 General purpose input pins. Pulled high internally on the module. I 3.3V PU 10K 3.3V GPI[1] A63 General purpose input pins. Pulled high internally on the module. I 3.3V PU 10K 3.3V GPI[2] A67 General purpose input pins. Pulled high internally on the module. I 3.3V PU 10K 3.3V GPI[3] A85 General purpose input pins. Pulled high internally on the module. I 3.3V PU 10K 3.3V PU/PD PU 10K 3.
Signal Pin # Description I/O PU/PD Comment BATLOW# A27 Battery low input. This signal may be driven low by external circuitry to signal that the system battery is low, or may be used to signal some other external power-management event. I 3.3VSB PU 10k 3.3VSB LID# LID button. Low active signal used by the ACPI operating system for a LID switch. I OD 3.3VSB PU 10k 3.3VSB Emulated on GPIO (BIOS) SLEEP# Sleep button.
3.4. CD Signal Descriptions 3.4.1. USB 3.
3.4.3.
DDI 2 Signal Pin Description DDI2_PAIR0+ DDI2_PAIR0DDI2_PAIR1+ DDI2_PAIR1DDI2_PAIR2+ DDI2_PAIR2DDI2_PAIR3+ DDI2_PAIR3- D39 D40 D42 D43 D46 D47 D49 D50 Digital Display Interface2 differential pairs DDI2_HPD D44 DDI2_CTRLCLK_AUX+ C32 DDI2_CTRLCLK_AUX- DDI2_DDC_AUX_SEL C33 I/O PU/PD Comment PD 100K IF DDI2_DDC_AUX_SEL is floating I/O PCIe DP2_AUX+ IF DDI2_DDC_AUX_SEL pulled high I/O OD 3.
3.4.4.
3.4.5.
3.4.6. Module Type Definition Signal Pin # Description TYPE0# TYPE1# TYPE2# C54 C57 D57 The TYPE pins indicate to the Carrier Board the Pin-out Type that is implemented on the module. The pins are tied on the module to either ground (GND) or are noconnects (NC). For Pinout Type 1, these pins are don’t care (X).
4. Module Interfaces This chapter describes connectors and pinouts, LEDs and switches that are used on the module but are not included in the PICMG standard specification 4.1. Connector, Switch and LED Locations 4.1.1.
4.2. 40-pin Multipurpose Connector ¾ FPC Connector Type: FCI 59GF Flex 10042867 ¾ Pin Orientation : 1 40 Pin Definitions (on COMe module) ¾ Pin Interface Signal Remark Pin Interface Signal 1 SPI Program interface VCC_SPI_IN SPI Power Input from flash tool to module.
4.3. Status LEDs To facilitate easier maintenance, status LED’s are mounted on the board. LED1 LED2 LED3 ¾ LED Descriptions: Name Color Connection Function LED1 Blue BMC output Power Sequence Status Code (BMC) Power Changes, RESET (see 5.1.
4.4. XDP Debug Header The debug port is a connection into a target-system environment that provides access to JTAG, run control, system control, and observation resources. The XDP target system connector is a Molex 26-pin 52435-2671 connector. Specific plating types, locking clips, and alignment pin details of this connector can be obtained from Molex. No specific plating types, locking clips or alignment pins are required for the XDP tool.
4.6. BIOS Setup Defaults RESET Button To perform a hardware reset of BIOS default settings, perform the following steps: 1. Shut down the system. 2. Press the BIOS Setup Defaults RESET Button continuously and boot up the system. You can release the button when the BIOS prompt screen appears 3. The BIOS prompt screen will display a confirmation that BIOS defaults have been reset and request that you reboot the system.
4.7.
5. Smart Embedded Management Agent (SEMA) The onboard microcontroller (BMC) implements power sequencing and Smart Embedded Management Agent (SEMA) functionality. The microcontroller communicates via the System Management Bus with the CPU/chipset. The following functions are implemented. • Total operating hours counter. Counts the number of hours the module has been run in minutes. • On-time minutes counter. Counts the seconds since last system start.
5.1. Board Specific SEMA Functions 5.1.1. Voltages The BMC of the cExpress-BT implements a voltage monitor and samples several onboard voltages. The voltages can be read by calling the SEMA function “Get Voltages”. The function returns a 16-bit value divided into high-byte (MSB) and low-byte (LSB). 5.1.2. ADC Channel Voltage Name Voltage Formula [V] 0 CPU-Vcore (MSB<<8 + LSB) x 3.3 / 1024 1 GFX-Vcore (MSB<<8 + LSB) x 3.3 / 1024 2 +V1.05S (MSB<<8 + LSB) x 3.
5.1.4. Exception Codes In case of an error, the BMC drives a blinking code on the blue Status LED (LED1). The same error code is also reported by the BMC Flags register. The Exception Code is not stored in the Flash Storage and is cleared when the power is removed. Therefore, a “Clear Exception Code” command is not needed or supported. 5.1.5.
6. System Resources 6.1. System Memory Map Address Range (decimal) Address Range (hex) Start 128KB below 1MB 000E0000h-000FFFFFh Low BIOS Starts 20MB below 4GB FEC00000h-FEC0040h IO APIC Start 19MB below 4GB FED00000h-FED003FFh HPET Start 64 KB below 4GB FFFF0000h-FFFFFFFFh High BIOS 0K –1MB 6.2.
6.3. Interrupt Request (IRQ) Lines 6.3.1.
6.3.2.
6.4.
6.5.
7. BIOS Setup 7.1. Menu Structure This section presents the primary menus of the BIOS Setup Utility. Use the following table as a quick reference for the contents of the BIOS Setup Utility. The subsections in this section describe the submenus and setting options for each menu item. The default setting options are presented in bold, and the function of each setting is described in the right hand column of the respective table.
7.2. Main The Main Menu provides read-only information about your system and also allows you to set the System Date and Time. Refer to the tables below for details of the submenus and settings. 7.2.1. System Information Feature Options Description BIOS Version Info only ADLINK BIOS version Build Date and Time Info only Date the BIOS was built 7.2.2.
7.2.6. System Management 7.2.6.1.
Feature Options Description V1.35 Read only Display actual V1.35 voltage V1.00 Read only Display actual V1.00 voltage V3.30 Read only Display actual V3.30 voltage VIN Read only Display actual VIN voltage AIN7 Read only Display actual AIN7 voltage 7.2.6.4. System Management > Runtime Statistics Feature Options Runtime Statistics Info only Description Total Runtime Read only The returned value specifies the total time in minutes the system is running in S0 state.
7.2.6.6. System Management > Power Up Feature Options Power Up Info only Power Up watchdog Attention: F12 disables the Power Up Watchdog. Enabled Disabled The Power-Up Watchdog resets the system after a certain amount of time after power-up. Disabled Enable Reduces the power consumption of the system Turn on Remain off Last State Turn On: The machine starts automatically when the power supply is turned on. Remain Off: To start the machine the power button has to be pressed.
7.2.7. System Date and Time Feature Options Description System Date Day of Week, MM/DD/YYYY Requires the alpha-numeric entry of the day of the week, day of the month, calendar month, and all 4 digits of the year, indicating the century and year (Fri XX/XX/20XX) System Time HH/MM/SS Presented as a 24-hour clock setting in hours, minutes, and seconds 7.3. Advanced This menu contains the settings for most of the user interfaces in the system. 7.3.1.
Feature Options Description EIST Disabled Enabled Enable/Disable Intel SpeedStep CPU C state Report Disabled Enabled Enable/Disable CPU C state report to OS CPU DTS Disabled Enabled Enabled/Disable digital thermal sensor Feature Options Description Memory Info only Total Memory Info only Display total memory DIMM#0/1 Info only Display DIMM#0/1 SPD Write Protect Enabled Disabled Enabled: Writes to SMBus slave addresses A0h – Aeh are disabled Max TOLUD Dynamic Maximum value of TOLU
7.3.3.1. AMI Graphics Output Protocol Policy Feature Options Intel(R) Valley View Graphics Controller Info only Intel(R) GOP Driver Info only Output Select [List connect device] CRT Output Interface. Brightness Setting [LFP device connect only] 255 Set GOP Brightness value BIST Enable Enabled Disabled Starts or stops the built-in self-test (BIST) on the integrated display panel. 7.3.4.
Feature Options Description XHCI Hand-off Enabled Disabled This is a workaround for OSes without XHCI hand-off support. The XHCI ownership change should be claimed by the XHCI OS driver. EHCI Hand-off Enabled Disabled This is a workaround for OSes without EHCI hand-off support. The EHCI ownership change should be claimed by the EHCI OS driver. USB Mass Storage Driver Support Enabled Disabled Enable/Disable USB mass storage driver support.
7.3.7. PCI and PCIe Feature Options PCI and PCIe Info only PCI Common Settings Info only PCI Latency 32 PCI Bus Clocks 64 PCI Bus Clocks 96 PCI Bus Clocks 128 PCI Bus Clocks 160 PCI Bus Clocks 192 PCI Bus Clocks 224 PCI Bus Clocks 248 PCI Bus Clocks Value to be programmed into PCI latency timer register. VGA Palette Snoop Disabled Enabled Enables or Disables VGA palette registers snooping. PERR# Generation Enabled Disabled Enable or Disable the PCI Express port 1 in the chipset.
Feature Options Description Unpopulated Links Keep Link ON Disabled In order to save power, software will disable unpopulated PCI Express links if this option set to Disabled. Restore PCIE Registers Enabled Disabled On non-PCI Express aware OSes (pre Windows Vista) some devices may not be correctly reinitialized after S3. Enabling this restores PCI Express device configurations on S3 resume. Warning: Enabling this may cause issues with other hardware after S3 resume.
7.3.8. Super IO Feature Options Super IO Chip Info only W83627DHG Super IO Configuration Info only Serial Port 1 Configuration Serial Port Enabled Disabled Enable/Disable Serial Port 1 (COM0). Device Settings IO=3F8h; IRQ=4 Fixed configuration of serial port. Change Settings Auto IO=3F8h; IRQ=4 IO=3F8h; IRQ=3,4,5,6,7,10,11,12 IO=2F8h; IRQ=3,4,5,6,7,10,11,12 IO=3E8h; IRQ=3,4,5,6,7,10,11,12 IO=2E8h; IRQ=3,4,5,6,7,10,11,12 Select an optimal setting for Super IO device.
7.3.10. Sound Feature Options Description Sound Info only Azalia Disabled Enabled Control detection of the Azalia device. Disabled = Azalia will be unconditionally disabled. Enabled = Azalia will be unconditionally enabled. Auto = Azalia will be enabled if present, disabled otherwise. Azalia Docking Support Disabled Enabled Enable/Disable Azalia docking support of audio controller. Azalia PME Disabled Enabled Enable/Disable power management capability of audio controller.
Feature Options Description Mark Space Stop Bits 1 2 Select number of stop bits. Flow Control None Hardware RTS/CTS Select flow control. VT-UTF8 Combo Key Support Disabled Enable Enable VT-UTF8 combination key support for ANSI/VT100 terminals. Recorder Mode Disabled Enable With this mode enabled only text will be sent. This is to capture terminal data.
7.3.13. Miscellaneous Feature Options Miscellaneous Info only High Precision Timer Enabled Disabled SCC Configuration Submenu Security Info only BIOS Security Configuration Submenu Trusted Computing Submenu 7.3.13.1. Description Enable or disable the High Precision Event Timer. Miscellaneous > SCC Configuration Feature Options Description OS Selection Windows 8.X Android Windows 7 OS Selection SCC Devices Mode ACPI mode PCI mode SCC devices mode setting.
7.3.13.2. Miscellaneous > BIOS Security Configuration Feature Options BIOS Security Configuration Info only Global SMI Lock Enabled Disabled 7.3.13.3. Description Enable or disable SMI lock. Miscellaneous > Trusted Computing Feature Options Coniguration Info only Security Device Support Enabled Disabled Current Status Information Info only Description Enables or disables BIOS support for security device. OS will not show security device.
7.4.1.1. Boot Configuration > CSM Parameters Feature Options Description Compatibility Support Module Configuration Info CSM Support Enabled Disable CSM16 Module Version Info only GataA20 Active Upon Request Always Upon Request – GA20 can be disabled using BIOS services. Always – do not allow disabling of GA20; this option is useful when any RT code is executed above 1MB. Option ROM Messages Force BIOS Keep Current Set display mode for Option ROM.
7.5.1.1. Security > Secure Boot Menu Feature Options Description System Mode Setup Secure Boot Info only Secure Boot Disabled Enabled Secure Boot can be enabled if: 1. System running in User mode with enrolled Platform Key (PK) 2. CSM function is disabled. Secure Boot Mode Standard Custom Secure Boot mode selector. 'Custom' Mode enables users to change Image Execution policy and manage Secure Boot keys.
8. BIOS Checkpoints, Beep Codes This section of this document lists checkpoints and beep codes generated by AMI Aptio BIOS. The checkpoints defined in this document are inherent to the AMIBIOS generic core, and do not include any chipset or board specific checkpoint definitions. Checkpoints and Beep Codes Definition A checkpoint is either a byte or word value output to I/O port 80h.
8.1. Checkpoint Ranges Status Code Range Description 0x01 – 0x0B SEC execution 0x0C – 0x0F SEC errors 0x10 – 0x2F PEI execution up to and including memory detection 0x30 – 0x4F PEI execution after memory detection 0x50 – 0x5F PEI errors 0x60 – 0x8F DXE execution up to BDS 0x90 – 0xCF BDS execution 0xD0 – 0xDF DXE errors 0xE0 – 0xE8 S3 Resume (PEI) 0xE9 – 0xEF S3 Resume errors (PEI) 0xF0 – 0xF8 Recovery (PEI) 0xF9 – 0xFF Recovery errors (PEI) 8.2. Standard Checkpoints 8.2.1.
SEC Error Codes 0x0C – 0x0D Reserved for future AMI SEC error codes 0x0E Microcode not found 0x0F Microcode not loaded 8.2.2. SEC Beep Codes None 8.2.3.
Status Code Description 0x35 CPU post-memory initialization. Boot Strap Processor (BSP) selection 0x36 CPU post-memory initialization.
Status Code Description 0xEA S3 Resume Boot Script Error 0xEB S3 OS Wake Error 0xEC-0xEF Reserved for future AMI error codes Recovery Progress Codes 0xF0 Recovery condition triggered by firmware (Auto recovery) 0xF1 Recovery condition triggered by user (Forced recovery) 0xF2 Recovery process started 0xF3 Recovery firmware image is found 0xF4 Recovery firmware image is loaded 0xF5-0xF7 Reserved for future AMI progress codes Recovery Error Codes 0xF8 Recovery PPI is not available 0xF9 R
Status Code Description 0x65 CPU DXE initialization (CPU module specific) 0x66 CPU DXE initialization (CPU module specific) 0x67 CPU DXE initialization (CPU module specific) 0x68 PCI host bridge initialization 0x69 North Bridge DXE initialization is started 0x6A North Bridge DXE SMM initialization is started 0x6B North Bridge DXE initialization (North Bridge module specific) 0x6C North Bridge DXE initialization (North Bridge module specific) 0x6D North Bridge DXE initialization (North Bri
Status Code Description 0x9C USB Detect 0x9D USB Enable 0x9E – 0x9F Reserved for future AMI codes 0xA0 IDE initialization is started 0xA1 IDE Reset 0xA2 IDE Detect 0xA3 IDE Enable 0xA4 SCSI initialization is started 0xA5 SCSI Reset 0xA6 SCSI Detect 0xA7 SCSI Enable 0xA8 Setup Verifying Password 0xA9 Start of Setup 0xAA Reserved for ASL (see ASL Status Codes section below) 0xAB Setup Input Wait 0xAC Reserved for ASL (see ASL Status Codes section below) 0xAD Ready To Boot ev
Status Code Description 0xD5 No Space for Legacy Option ROM 0xD6 No Console Output Devices are found 0xD7 No Console Input Devices are found 0xD8 Invalid password 0xD9 Error loading Boot Option (LoadImage returned error) 0xDA Boot Option is failed (StartImage returned error) 0xDB Flash update is failed 0xDC Reset protocol is not available 8.2.6.
8.3.
9. Mechanical Information 9.1. Board-to-Board Connectors To allow for different stacking heights, the receptacles for COM Express carrier boards are available in two heights: 5 mm and 8 mm. When 5 mm receptacles are chosen, the carrier board should be free of components. Tyco 3-1827253-6 Foxconn QT002206-2131-3H • 220-pin board-to-board connector with 0.5mm for a stacking height of 5 mm. • This connector can be used with 5 mm through-hole standoffs (SMT type).
9.2. Thermal Solution 9.2.1. Heat Spreaders The function of the heat spreader is to ensure an identical mechanical profile for all COM Express modules. By using a heat spreader, the thermal solution that is built on top of the module is compatible with all COM Express modules. 9.2.2. Heat Sinks A heat sink can be used as a thermal solution for a specific COM Express module and can have a fan or be fanless, depending on the thermal requirements. 9.2.3.
Step 3: Assemble the heatsink onto the COM Express module. Use the four M2.5, L=6mm screws provided to fasten the heatsink to the module. Step 4: Place the COM Express module and heatsink assembly onto the connectors on the carrier board as shown. Then press down on the module until it is firmly seated on the carrier board. Step 5: Use the five M2.5, L=16mm screws provided to secure the COM Express module to the carrier board from the solder side.
Step 6: If you are installing a heatsink with a fan, plug the fan connector into the carrier board as shown.
9.3. Mounting Methods There are several standard ways to mount the COM Express module with a thermal solution onto a carrier board. In addition to the choice of 5 mm or 8mm board-to-board connectors, there is the choice of Top and Bottom mounting. In Top mounting, the threaded standoffs are on the carrier board and the thermal solution is equipped with through-hole standoffs. In Bottom mounting, the threaded standoffs are on the thermal solution and the carrier board has through-hole standoffs.
9.4. Standoff Types The standoffs available for Top and Bottom mounting methods are shown below. Note that threaded standoffs are DIP type and throughhole standoffs are SMT type. Other types not listed are available upon request.
Safety Instructions Read and follow all instructions marked on the product and in the documentation before you operate your system. Retain all safety and operating instructions for future use. • Please read these safety instructions carefully. • Please keep this User‘s Manual for later reference. • Read the specifications section of this manual for detailed information on the operating environment of this equipment.
Getting Service ADLINK Technology, Inc. Address: Tel: Fax: Email: 9F, No.166 Jian Yi Road, Zhonghe District New Taipei City 235, Taiwan +886-2-8226-5877 +886-2-8226-5717 service@adlinktech.com Ampro ADLINK Technology, Inc. Address: Tel: Toll Free: Fax: Email: 5215 Hellyer Avenue, #110, San Jose, CA 95138, USA +1-408-360-0200 +1-800-966-5200 (USA only) +1-408-360-0222 info@adlinktech.com ADLINK Technology (China) Co., Ltd. Address: Tel: Fax: Email: 300 Fang Chun Rd.
ADLINK Technology, Inc. (French Liaison Office) Address: 6 allée de Londres, Immeuble Ceylan 91940 Les Ulis, France Tel: +33 (0) 1 60 12 35 66 Fax: +33 (0) 1 60 12 35 66 Email: france@adlinktech.com ADLINK Technology Japan Corporation Address: KANDA374 Bldg. 4F, 3-7-4 Kanda Kajicho, Chiyoda-ku Tokyo 101-0045, Japan Tel: +81-3-4455-3722 Fax: +81-3-5209-6013 Email: japan@adlinktech.com ADLINK Technology, Inc.
