NuDAQ® cPCI-7248/7249R PCI-7224/7248/7296 24/48/96-CH Digital I/O Card Users’ Guide Recycled Paper
©Copyright 1997~2002 ADLINK Technology Inc. All Rights Reserved. Manual Rev. 2.60: April 25, 2003 Part No. 50-11104-201 The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer.
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Table of Contents Introduction................................................................................1 1.1 Features .................................................................................2 1.1.1 Digital I/O Ports ................................................................................2 1.1.2 Timer/Counter and Interrupt System.................................................2 1.1.3 Miscellaneous ...................................................................................
Registers Format .....................................................................20 3.1 3.2 PCI PnP Registers ...............................................................20 I/O Address Map ..................................................................21 Operation Theorem..................................................................22 4.1 4.1.1 4.1.2 4.1.3 4.1.4 4.1.5 4.1.6 4.1.7 4.1.8 4.2 4.2.1 4.2.2 4.2.2 4.2.3 4.3 4.3.1 4.3.2 4.3.3 4.3.4 4.4 Digital I/O Ports ........................
5.14 5.15 5.16 5.17 Clear IRQ..............................................................................45 Software Reset.....................................................................45 Interrupt Start under Windows .............................................46 Interrupt Stop under Windows..............................................47 Warranty Policy........................................................................
How to Use This Guide This manual is designed to help you use the 7248/96 series products. It describes how to modify and control various functions on the cards to meet your requirements. It is divided into five chapters: z Chapter 1, Introduction, gives an overview of the product features. applications, and specifications. z Chapter 2, Installation, describes how to install the 7248/96 series products.
1 Introduction The 7248/7296 series products are general purpose digital I/O cards. This series includes four cards: z PCI-7224: 24-CH DIO card z PCI-7248: 48-CH DIO card z PCI-7296: 96-CH DIO card z cPCI-7248: 3U CompactPCI 48-CH DIO card z cPCI-7249R: 3U CompactPCI 48-CH DIO card with Rear I/O The 7248 series products are multi-function digital I/O boards used for industrial PC with PCI bus or CompactPCI bus.
1.1 Features The 7248/96 series products provide the following advanced features: 1.1.1 Digital I/O Ports z z z z z 24/48/96 TTL/DTL compatible digital I/O lines Emulates industry standard mode 0 of 8255 PPI Buffered circuits for higher driving Direct interface with OPTO-22 compatible I/O module Output status read-back 1.1.
1.3 Specifications I/O channels Digital Input Signal Digital Output Signal Operating Temperature Storage Temperature Humidity I/O Connectors Bus Power Consumption (without external devices) Transfer Rate PCB Dimension 24-bit for PCI-7224 48-bit for PCI-7248 96-bit for PCI-7296 48-bit for cPCI-7248 and cPCI-7249R Logic High Voltage:2.0 V to 5.25V Logic Low Voltage: 0.0 V to 0.80V Logic High Current: 20.0 uA Logic Low Current: -0.2 mA Logic High Voltage: Minimum 2.4 V Logic Low Voltage: Maximum 0.
1.4 Software Supporting ADLINK provides versatile software drivers and packages for users’ different approach to built-up a system. We not only provide programming library such as DLL for many Windows systems, but also provide drivers for many ® TM TM TM software package such as LabVIEW , HP VEE , DASYLab , InTouch , TM TM InControl , ISaGRAF , and so on. All the software options are included in the ADLINK CD. The non-free software drivers are protected with serial licensed code.
1.4.2 PCIS-LVIEW: LabVIEW® Driver PCIS-LVIEW contains the VIs, which are used to interface with NI’s ® software package. The PCIS-LVIEW supports Windows LabVIEW ® 95/98/NT/2000. The LabVIEW drivers are free shipped with the board. You can install and use them without license. For detail information about PCISLVIEW, please refer to the user’s guide in the CD. (\\Manual_PDF\Software\PCIS-LVIEW) 1.4.
TM 1.4.7 PCIS-ISG: ISaGRAF driver The ISaGRAF WorkBench is an IEC1131-3 SoftPLC control program development environment. The PCIS-ISG includes ADLink products’ target drivers for ISaGRAF under Windows NT environment. The PCIS-ISG is included in the ADLINK CD. It needs license. TM 1.4.8 PCIS-ICL: InControl Driver PCIS-ICL is the InControl driver which support the Windows NT. The PCISICL is included in the ADLINK CD. It needs license. 1.4.
2 Installation This chapter describes how to install the 7248/96 series products. At first, the contents in the package and unpacking information that you should be careful of are described. z z z z z z z z 2.1 Check what you have (section 2.1) Unpacking (section 2.2) Check the PCB (section 2.3) Hardware installation (section 2.4) Device Installation for Windows System (section 2.5) Connector pin assignment (section 2.6) Jumpers setup (section 2.7) Termination boards connection (section 2.
2.2 Unpacking Your card contains sensitive electronic components that can be easily damaged by static electricity. The card should be put on a grounded anti-static mat. The operator should wear an anti-static wristband, grounded at the same point as the anti-static mat. Inspect the card module carton for obvious damage. Shipping and handling may cause damage to your module. Be sure there is no shipping and handling damage on the module before processing.
2.3 PCB Layout 2.3.1 PCI-7248/7224 PCB Layout Figure 2.3.1 PCI-7248/7224 PCB Layout 2.3.2 PCI-7296 PCB Layout PCI Controller CN1 CN2 CN3 CN4 Figure 2.3.
2.3.3 cPCI-7248 PCB Layout CPCI-7248 JC2 JB2 JA2 PCI Controller Chip JA1 JB1 JC1 CN1 Figure 2.3.3 cPCI-7248 PCB Layout 2.3.4 cPCI-7249R PCB Layout Figure 2.3.
2.4 Hardware Installation PCI configuration The PCI cards (or CompactPCI cards) are equipped with plug and play PCI controller, it can request base addresses and interrupt according to PCI standard. The system BIOS will install the system resource based on the PCI cards’ configuration registers and system parameters (which are set by system BIOS). Interrupt assignment and memory usage (I/O port locations) of the PCI cards can be assigned by system BIOS only.
CompactPCI Installation Procedures 1. Read through this manual, and setup the jumper according to your application. 2. Turn off your computer and turn off all accessories computer. connected to 3. Remove the slot cover from the CompactPCI. 4. Select a 32-bit CompactPCI slot on the back plane for cPCI-7248 board. Select a 32-bit CompactPCI slot with rear I/O extension for cPCI-7249R. 5. Before handling the boards, discharge any static buildup on your body by touching the metal case of the computer.
2.6 Connector Pin Assignment 2.6.1 Pin Assignment of PCI-7224/7248/7296 The I/O ports of PCI-7224/7248/7296 emulate the mode 0 configuration of the 8255 general purpose programmable peripheral interface. The cards come equipped with 50-pin male IDC connectors that interface with OPTO-22. Figure 2.4 shows the circuits and pinout of PCI-7224/7248/7296's connectors (CN1~CN4) .
2.6.2 Pin Assignment of cPCI-7248 The cPCI-7248 is equipped a SCSI-type 100-pin connector. assignment is described in Figure 2.6.
2.6.3 Pin Assignment of cPCI-7249R The I/O ports of cPCI-7249R emulate the mode 0 configuration of the 8255 general purpose programmable peripheral interface. This card comes equipped with SCSI -100 Pin connector. And the cPCI-7249R supports R7249 daughter board for rear I/O, it includes two OPTO-22 connectors and one SCSI -100 connector.
2.6.4 R7249 OPTO-22 Connectors The cPCI-7249R’s rear I/O transition board R7249 is equipped with two 50 pin male IDC connectors XCN2, XCN3, that interface with OPTO-22. Figure 2.3 R7249 OPTO-22 Connectors Pin Assignment Note : The power supply pins are protected by resetable fuses. Refer to section 3.7 for details of the power supply.
2.7 Jumpers Description The 7248/96 DIO cards are ‘plug-and-play’, thus it is not necessary to setup the card configurations to fit the computer system. However, to fit users’ versatile operation environment, there are still a few jumpers to set the power-on status of ports and the usage of the +12V output pins. 2.7.1 Power on Status of Ports For every port on the 7248/96 cards, the power-on status is set as input, therefore, the voltage could be pulled high, pulled low, or floating.
2.7.2 12V Power Supply Configuration The pin 2 and pin 4 of the CN1 ~ CN4 50-pin OPTO-22 connectors can be configured as 12V power supply or ground. Please refer to Figure 2.4 for the 12 volts power supply position. JP1~JP4 of the 12V power are for CN1~CN4 respectively. Connections with ground are set as default. The following diagram shows the setting of JP2, connecting the pin 2 and pin 4 of CN2 to ground. (12V)1 2.
3. TB-16P8R The TB-16P8R provides 16 opto-isolated digital input channels and 8 relay outputs. P C I- 7 2 9 6 P C I- 7 2 4 8 T B -1 6 P 8 R 4. TB-24, DIN-50S TB-24 and DIN-50S are termination boards with 50 pin ribbon connector. They are used for general-purpose applications. 5. DIN-100S DIN-100S is equipped with 100-pin SCSI-type connector. It can connected with cPCI-7248 and cPCI-7249R.
3 Registers Format The detailed descriptions of the registers format are specified in this chapter. This information is quite useful for the programmers who wish to handle the card by low-level programming. However, we suggest user have to understand more about the PCI interface then start any low-level programming. In addition, the contents of this chapter can help users understand how to use software driver to manipulate this card. 3.
3.2 I/O Address Map All the 724X registers are 8 bits. The users can access these registers only by 8 bits I/O instructions. The following table shows the registers map, including descriptions and their offset addresses relative to the base address. Please refer to the chapter 4 for more detailed operation of every registers.
4 Operation Theorem 4.1 Digital I/O Ports 4.1.1 Introduction The 7248/96 products can emulate one/two/four mode 0 configuration of 8255 programmable peripheral interface (PPI) chips. There are 24 DIO signals for every PPI. 4.1.
4.1.4 Digital I/O Port Programming Users can write the digital output value to or read back the digital signal level from the PPI ports by using the software library. Here we define the port name in Table 4.1. These port names are used both in software library and all through this manual. The programming for PCI-7224/7248/7296 and cPCI-7248 are fully compatible. Connector Numbers CN1 CN2 CN3 CN4 Port Names P1A P1B P1C P1CTRL P2A P2B P2C P2CTRL P3A P3B P3C P3CTRL P4A P4B P4C P4CTRL Table 4.
Control Word D 4 D 3 D 1 D 0 PORT A PORT C UPPER PORT B PORT C LOWER 00H 01H 02H 03H 08H 09H 0AH 0BH 10H 11H 12H 13H 18H 19H 1AH 1BH* 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 O/P O/P O/P O/P O/P O/P O/P O/P I/P I/P I/P I/P I/P I/P I/P I/P O/P O/P O/P O/P I/P I/P I/P I/P O/P O/P O/P O/P I/P I/P I/P I/P O/P O/P I/P I/P O/P O/P I/P I/P O/P O/P I/P I/P O/P O/P I/P I/P O/P I/P O/P I/P O/P I/P O/P I/P O/P I/P O
4.2 Timer/Counter Operation 4.2.1 Introduction One 8254 programmable timer/counter chip is installed in 7248/96 series. There are three counters in one 8254 chip and 6 possible operation modes for each counter. The block diagram of the timer /counter system is shown in Figure 4.2. P1C4 Trigger Edge Control 2 MHz Clock 8254 Chip C 'H' Counter #0 O Timer #1 O Timer #2 O Event IRQ G C 'H' G C Timer IRQ 'H' G Figure 4.2 Timer/counter system of 7248/96 series.
The 8254 timer/ counter IC occupies 4 I/O address. Users can refer to Tundra's or Intel's data sheet for a full description of the 8254 features. You can download the 8254 data sheet from the following web site: http://support.intel.com/support/controllers/peripheral/231164.htm or http://www.tundra.com (for Tundra’s 82C54 datasheet.) 4.2.2 Cascaded 32 Bits Timer The input clock frequency of the cascaded timers is 2MHz. The output of the timer is send to the interrupt circuit (refer to section 4.3).
4.3.2 IRQ Level Setting There is only one IRQ level requested by this card, although it is a dual interrupt system. The mother board circuits will transfer INTA# to one of the PC IRQ levels. The IRQ level is set by the PCI plug and play BIOS and saved in the PCI controller. Users can get the IRQ level setting by software library. INT1 INTA# PCI Controller INT2 IRQ FlipFlops INT1 MUX P1C0 ~P1C0 & P1C3 Event Counter INT2 MUX P2C0 (*) ~P2C0 & P2C3 (*) Timer IRQ Clear IRQ Fig 4.
4.3.4 Interrupt Source Control In ISC register (offset 0x20), there are four bits to control the IRQ sources of INT1 and INT2. If the application need only one IRQ, you can disable one of the IRQ sources by software. If your application do not need any IRQ source, you can disable both interrupts. However, the PCI BIOS still assign a IRQ level to the PCI card and occupy the PC resource, if you only disable the IRQ sources without change the initial condition of the PCI controller.
4.4 12V and 5V Power Supply The OPTO-22 compatible connectors provide external devices the +12 volts and +5 volts power supply. To avoid short or overload of the power supply, the resetable fuses are added on all the output power. Refer to Figure 2.6.1 The maximum current for 5 volts on every connector is 0.5 A. If the load current is larger than 0.5 A, the resistance of resetable fuse will increase because of the rising temperature.
5 C/C++ Libraries This chapter describes the software library for operating these card. Only the functions in DOS library and Windows 95 DLL are described. Please refer to the PCIS-DASK function reference manual, which included in ADLINK CD, for the descriptions of the Windows 98/NT/2000 DLL functions. The functions of PCI-7248 can also be applied to PCI-7224 and cPCI-7248. Therefore, in the following section, there is no special functions for PCI-7224 and cPCI7248.
5.2 Programming Guide 5.2.1 Naming Convention The functions of the NuDAQ PCI cards or NuIPC CompactPCI cards’ software driver are using full-names to represent the functions' real meaning. The naming convention rules are: In DOS Environment: _{hardware_model}_{action_name}. e.g. _7248_Initial(). All functions in PCI-7248 driver are with 7248 as {hardware_model}. But they can be used by PCI-7248, PCI-7224 and cPCI-7248.
5.3 _7248/96_Initial @ Description The cards are initialized by this function. The software library could be used to control multiple cards.
5.4 Digital Input @ Description This function is used to read 8-bit digital input data from digital input ports. You can get the 8-bit data from _7248_DI by using this function. The written data and read in data is 8-bit data. Each data is mapped to a signal as the table below.
PCI_CH2_PCU: CH2’s Port C PCI_CH2_PCL: CH2’s Port C PCI_CH3_PA: CH3’s Port A PCI_CH3_PB: CH3’s Port B PCI_CH3_PC: CH3’s Port C PCI_CH3_PCU: CH3’s Port C PCI_CH3_PCL: CH3’s Port C PCI_CH0_PAE: CH1’s Port A PCI_CH0_PBE: CH1’s Port B PCI_CH0_PCE: CH1’s Port C PCI_CH1_PAE: CH2’s Port A PCI_CH1_PBE: CH2’s Port B PCI_CH1_PCE: CH2’s Port C Note: Upper Nibble Low Nibble Upper Nibble Low Nibble uses External uses External uses External uses External uses External uses External 1.
5.5 Digital Output @ Description This function is used to write data to digital output ports.
5.6 Configuration Port @ Description This function is used to configure the Input or Output of each Port. Each I/O Port of PCI-7224/7248/7296 is either input or output, so it has to configure as input or output before I/O operations are applied.
5.7 Configuration Channel @ Description This function is used to configure the Input or Output of each Channel. Each I/O Port of PCI-7224/7248/7296 is either input or output, so it has to configure as input or output before I/O operations are applied.
ctrlValue PORT_OOOO PORT_OOOI PORT_OOIO PORT_OOII PORT_OIOO PORT_OIOI PORT_OIIO PORT_OIII PORT_IOOO PORT_IOOI PORT_IOIO PORT_IOII PORT_IIOO PORT_IIOI PORT_IIIO PORT_IIII Port A OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN IN IN Port CU Port B OUT OUT OUT OUT OUT IN OUT IN IN OUT IN OUT IN IN IN IN OUT OUT OUT OUT OUT IN OUT IN IN OUT IN OUT IN IN IN IN Port CL OUT IN OUT IN OUT IN OUT IN OUT IN OUT IN OUT IN OUT IN The ctrlValue constants are defined in acl_pci.h and acl_pci.bas.
5.8 Set Interrupt Control @ Description This function is used to set the interrupt configuration. The interrupt should be configured before the function starts.
5.9 Timer Start @ Description This function is used to set and start the timer0 of the on-board timer 8254 .
5.10 Timer Read @ Description This function is used to read the current count of the timer0 of the onboard timer 8254 .
5.11 Timer Stop @ Description This function is used to stop the timer0 of the on-board timer 8254 .
5.12 Cascaded Timer @ Description This function is used to set and start the cascaded timer1 and timer 2 of the on- board timer 8254 .
5.13 Get IRQ Status @ Description This function is used to read back the status of interrupt when interrupt is inserted.
5.14 Clear IRQ @ Description This function is used to clear the interrupt generated from the 7248/96 series.
Visual Basic (Windows 95) W_7248_Software_Reset (ByVal cardNo As Integer) As Integer W_7249_Software_Reset (ByVal cardNo As Integer) As Integer W_7296_Software_Reset (ByVal cardNo As Integer) As Integer @ Argument cardNo: card number which the DIO will be reset. @ Return Code ERR_NoError 5.16 Interrupt Start under Windows @ Description This function is only available in Windows 95/98 driver. This function is used to initialize and start up the interrupt control. Please refer to section 4.
@ Argument cardNo: card number which the DIO will be reset. c1: If the interrupt source is set as internal timer source, this value is the frequency divider of Timer#1. c2: If the interrupt source is set as internal timer source, this value is the frequency divider of Timer#2. ctrlValue:the value for INT mode setting. The value can be set for INT1 is INT1_OFF, INT1_P1C0, INT1_P1C3C0, or INT1_EVENT_IRQ. The value can be set for INT2 is INT2_OFF, INT2_P2C0, INT2_P2C3C0, or INT2_TIMER_IRQ.
Warranty Policy Thank you for choosing ADLINK. To understand your rights and enjoy all the after-sales services we offer, please read the following carefully. 1. Before using ADLINK’s products please read the user manual and follow the instructions exactly. When sending in damaged products for repair, please attach an RMA application form which can be downloaded from: http://rma.adlinktech.com/policy/. 2. All ADLINK products come with a limited two-year warranty, one year for products bought in China.
4. • Damage caused by inappropriate storage environments such as with high temperatures, high humidity, or volatile chemicals. • Damage caused by leakage of battery fluid during or after change of batteries by customer/user. • Damage from technicians. • Products with altered and/or damaged serial numbers are not entitled to our service. • This warranty is not transferable or extendible. • Other categories not protected under our warranty.